Is Cloud Computing Suitable for Chip Design?


Is semiconductor design being left behind in a cloud-dominated world? Finance, CRM, office applications and many other sectors have made the switch to a cloud-based computing environment, but the EDA industry and its users have hardly started the migration. Are EDA needs and concerns that different from everyone else? We are starting to see announcements from EDA companies, but few cheerleaders... » read more

Betting Big On Discontinuity


Wally Rhines, president and CEO of Mentor, a Siemens Business, sat down with Semiconductor Engineering to talk about the booming chip industry, what's driving it, how long it will last and what changes are ahead in EDA and chip architectures. What follows are excerpts of that conversation. SE: The EDA and semiconductor industries are doing well right now. What's driving that growth? Rhine... » read more

Domain Crossing Nightmares


Semiconductor Engineering sat down to discuss problems associated with domain crossings with Alex Gnusin, design verification technologist for Aldec; Pete Hardee, director, product management for Cadence; Joe Hupcey, product manager and verification product technologist for Mentor, a Siemens Business; Sven Beyer, product manager design verification for OneSpin; and Godwin Maben, applications en... » read more

Using CAA And DFM Scoring To Improve Manufacturing Success


Critical area analysis and design for manufacturing scoring both offer designers actionable information they can use to improve their designs to prevent low-yield issues in the foundry. At the same time, they provide the foundry with information they can use for process improvement. Learn how fabless designers, foundries, and integrated device manufacturers can all benefit from addressing manuf... » read more

Blog Review: Sept. 26


VLSI Research's Dan Hutcheson chats with GlobalFoundries CEO Tom Caulfield about the company's changing strategy, how the company got to its present point, and how many companies will be using leading edge technologies. Synopsys' Taylor Armerding looks for what's changed (or not) for the state of software security and breach disclosure regulations in the year since the massive Equifax data b... » read more

Week In Review: Design, Low Power


Tools & IP Cadence unveiled deep neural-network accelerator (DNA) AI processor IP, Tensilica DNA 100, targeted at on-device neural network inference applications. The processor is scalable from 0.5 TMAC (Tera multiply-accumulate) to 12 TMACs, or 100s of TMACs with multiple processors stacked, and the company claims it delivers up to 4.7X better performance and up to 2.3X more performance p... » read more

Auto Chip Design, Test Changes Ahead


The automotive industry’s unceasing demand for performance, coupled with larger and more complex processors, are driving broad changes in how electronics are designed, verified and tested. What's changing is that these systems, which include AI-oriented logic developed at the most advanced process nodes, need to last several times longer than traditional IT and consumer devices, and they n... » read more

Blog Review: Sept. 19


Applied Materials' David Thompson shares the new DARPA program that is focused on using correlated electrons to develop a new type of switch with quantum effects, potentially leading to unprecedented switching speeds. Mentor's Joe Hupcey III argues that for the most effective formal analysis, assertions should be as simple as possible and shares some tips on decomposing big assertions. Ca... » read more

Aging In Advanced Nodes


Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; Magdy Abadir, vice president of marketing at ... » read more

Week In Review: Design, Low Power


M&A Intel acquired NetSpeed Systems, a network-on-a-chip and interconnect fabric IP and tool provider. Founded in 2011, the San Jose-based company recently put a focus on interconnects designed with AI applications in mind. Intel has cast the acquisition as a way to tie a number of its other technologies together. The team will join Intel's Silicon Engineering Group. Intel has been a NetSp... » read more

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