tag: Mentor

Getting To Automotive Grade
By Ann Mutschler - 06 Sep, 2018 - Comments: 0

Given the amount of activity surrounding automotive semiconductor design today design teams want to know how to approach designs for a market they may not yet be intimately familiar with. EDA vendors are very quickly ramping tools and services to help them get there. One of these is Mentor, A Siemens Business, which has actually been working in this market segment for two decades. Andrew ... » read more

Cracking The Auto IC Market
By Ann Mutschler - 06 Sep, 2018 - Comments: 0

The market for automotive electronics is booming, and it has set off a global scramble among established chipmakers and startups. What's becoming clear, though, is that not everyone understands just how different automotive is from the mobile market. Mobile is still the highest-volume market for semiconductors, but the growth has flattened. In contrast, the value of the automotive electronic... » read more

Physical Verification For Silicon Photonics: Don’t Panic!
By Omar El-Sewefy - 06 Sep, 2018 - Comments: 0

Silicon photonics augments traditional electrical signals in integrated circuits (ICs) with light transmission to speed up data transfer and reduce power consumption. According to MarketsandMarkets, the overall silicon photonics market is worth approximately $774.1M in 2018, and is expected to reach $1,988.2M by 2023, at a CAGR of 20.8% between 2018 and 2023  [1]. Cloud computing is one market... » read more

‘Fuzzing’ A Virtual Prototype ECU To Improve Security
By Mentor, a Siemens Business - 05 Sep, 2018 - Comments: 0

Staying ahead in the arms race against hackers means constantly looking for novel ways to find and correct security flaws, including (and perhaps especially) when it comes to relatively low-level hardware. In this brief white paper we describe one such way — an automated fuzzing test of a virtual ECU to find and correct vulnerabilities during the upstream development process. To read more,... » read more

Blog Review: Sept. 5
By Jesse Allen - 05 Sep, 2018 - Comments: 0

Synopsys' Taylor Armerding looks at a case of exploding costs – up to $17 million – when the city of Atlanta, Georgia fell victim to the SamSam ransomware, plus the lessons other cities can take to improve their security. Cadence's Paul McLellan traces how a landmark moment in object recognition, the ImageNet database, has spurred increasingly better object recognition algorithms for alm... » read more

Using More Verification Cores
By Brian Bailey - 30 Aug, 2018 - Comments: 1

Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for ... » read more

Blog Review: Aug. 29
By Jesse Allen - 29 Aug, 2018 - Comments: 0

Mentor's Joe Hupcey III addresses inconclusive results in formal verification with tips on how to reduce the complexity of “assumption” properties to make them easier for the formal engines to digest and reach a solution. Cadence's Meera Collier looks beyond the immediate appeal of autonomous cars to the broader social implications of urban sprawl, public transit funding, and gentrificat... » read more

Partitioning Drives Architectural Considerations
By Ann Mutschler - 29 Aug, 2018 - Comments: 0

There are multiple reasons for design partitioning. One is complexity, because it’s faster and simpler to divide and conquer, particularly with third-party IP. A second reason involves power, where it may be more efficient to divide up functionality so each function be right-sized. A third involves performance, where memory utilization and processing can be split up according to functional pr... » read more

Is Software Necessary?
By Brian Bailey - 27 Aug, 2018 - Comments: 0

Hardware must be capable of running any software. While that might have been a good mantra when chips were relatively simple, it becomes an impossible verification task when dealing with SoCs that contain dozens of deeply embedded processors. When does it become necessary to use production software and what problems can that get you into? When verification targets such as power are added, it... » read more

Digital IC Bring-Up With A Bench-Top Environment
By Matthew Knowles - 23 Aug, 2018 - Comments: 1

One of the hottest markets for IC today is artificial intelligence (AI). The designs for AI chips are also among the largest and most complex, with billions of transistors, thousands of memory instances, and complex design-for-test (DFT) implementations with unique bring up and debug requirements. At this point, the volume of new AI chips is relatively low, but time-to-market is of paramount im... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy