tag: RISC-V

What Makes A Good AI Accelerator
By Ann Mutschler - 25 Oct, 2018 - Comments: 3

The rapid growth and dynamic nature of AI and machine learning algorithms is sparking a rush to develop accelerators that can be optimized for different types of data. Where one general-purpose processor was considered sufficient in the past, there are now dozens vying for a slice of the market. As with any optimized system, architecting an accelerator — which is now the main processing en... » read more

RISC-V: More Than a Core
By Brian Bailey - 15 Oct, 2018 - Comments: 2

The open-source RISC-V instruction set architecture (ISA) is attracting a lot of attention across the semiconductor industry, but its long-term success will depend on levels of cooperation never seen before in the semiconductor industry. The big question now is how committed the industry is to RISC-V's success. The real value that RISC-V brings is the promise of an ecosystem and the opportun... » read more

The Next Big Chip Companies
By Ed Sperling - 05 Oct, 2018 - Comments: 1

Rambus’ Mike Noonen looks at why putting everything on a single die no longer works, what comes after Moore’s Law, and what the new business model looks like for chipmakers. https://youtu.be/X6Kca8Vm-wA » read more

RISC-V Inches Toward The Center
By Ann Mutschler - 01 Oct, 2018 - Comments: 1

RISC-V is pushing further into the mainstream, showing up across a wide swath of designs and garnering support from a long and still-growing list of chipmakers, tools vendors, universities and foundries. In most cases it is being used as a complementary processor than a replacement for something else, but that could change in the future. What makes RISC-V particularly attractive to chipmaker... » read more

The Perfect Risk
By Brian Bailey - 27 Sep, 2018 - Comments: 0

The development of semiconductors is an act of risk management. Very simply put, if you take on too much risk, it could lead to product failure or a missed market window, both of which can cost $M. For a company that only produces one or two products a year, that can spell total disaster. If you do not take on enough risk, you are probably not going to end up with a competitive product that ... » read more

Processing In Memory
By Ed Sperling - 05 Sep, 2018 - Comments: 1

Adding processing directly into memory is getting a serious look, particularly for applications where the volume of data is so large that moving it back and forth between various memories and processors requires too much energy and time. The idea of inserting processors into memory has cropped up intermittently over the past decade as a possible future direction, but it was dismissed as an e... » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Aug, 2018 - Comments: 0

Intel disclosed a speculative execution side-channel attack method called L1 Terminal Fault (L1TF). Leslie Culbertson, Intel's executive vice president and general manager of Product Assurance and Security, writes: "This method affects select microprocessor products supporting Intel Software Guard Extensions (Intel SGX) and was first reported to us by researchers at KU Leuven University, Techni... » read more

Blog Review: Aug. 8
By Jesse Allen - 08 Aug, 2018 - Comments: 0

Cadence's Meera Collier provides a primer on the basics of quantum computing, including how quantum gates work using superpositions and how it could impact chip design. Mentor's Dennis Brophy shares a list of resources to help you get up to speed on the recently-approved Portable Test and Stimulus standard, which enables test scenarios to be run across different execution platforms. Synop... » read more

Safety, Security And PPA Tradeoffs
By Brian Bailey - 23 Jul, 2018 - Comments: 0

Safety and security are emerging as key design tradeoffs as chips are added into safety-critical markets, adding even more complexity into an already complicated optimization process. In the early days of semiconductor design, performance and area were traded off against each other. Then power became important, and the main tradeoffs became power, performance and area (PPA). But as chips inc... » read more

Five DAC Keynotes
By Brian Bailey - 17 Jul, 2018 - Comments: 0

The ending of Moore's Law may be about to create a new golden age for design, especially one fueled by artificial intelligence and machine learning. But design will become task-, application- and domain-specific, and will require that we think about the lifecycle of the products in a different way. In the future, we also will have to design for augmentation of experience, not just automation... » read more

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