Blog Review: Oct. 13


Cadence's Paul McLellan checks out what Google learned in developing multiple generations of its TPU processor, including unequal advancement of logic and memory, the importance of compiler of compatibility, and designing for total cost of ownership. Siemens EDA's Jake Wiltgen argues for the importance of linting as part of eliminating systematic failures in designs complying with ISO 26262.... » read more

Manage Scaling Challenges For Silicon Success


Semiconductor companies are faced with significant challenges related to technology scaling, design scaling, and system scaling. These challenges have a broad impact on design development, manufacturing, and functional operation. This paper discusses the challenges and the specific impact of a Silicon Lifecycle Solutions approach that includes DFT, operations, and Embedded Analytics in enabling... » read more

Packetized Test At The International Test Conference 2021


At this year’s International Test Conference (October 10-15, 2021), Siemens Digital Industries Software is showcasing IC test and lifecycle management technologies that address the key scaling challenges facing the semiconductor industry now and in the future. The two main topics from Tessent at ITC are: The rapid adoption of packetized test strategies to address design and system... » read more

Competing Auto Sensor Fusion Approaches


As today’s internal-combustion engines are replaced by electric/electronic vehicles, mechanical-system sensors will be supplanted by numerous electronic sensors both for efficient operation and for achieving various levels of autonomy. Some of these new sensors will operate alone, but many prominent ones will need their outputs combined — or “fused” — with the outputs of other sensor... » read more

How Verification And Validation Can Create A Comprehensive Digital Twin To Design Tomorrow’s Self-Driving Cars Today


By Shakeel Jeeawoody and Hieu Tran Autonomous vehicles (AV) are the future of driving – and the future might not be so far away. Optimizing the capabilities of self-driving vehicles and the environment around them could lead to a mad dash to the financial finish line for manufacturers. Who takes the checkered flag will ultimately be determined by the efficiency and cost-effectiveness of th... » read more

Security Risks Grow With 5G


5G mobile phones can download a movie in seconds rather than minutes, but whether that can be done securely remains to be seen. What is clear from technology providers, though, is they are taking security very seriously with this new wireless technology. More data is in motion, and the value of that data is growing as users rely on mobile devices for everything from banking to automotive saf... » read more

STMicroelectronics Methodology And Process For Heterogeneous Automotive Package Design


As a leading supplier of automotive semiconductors, STMicroelectronics must continue to move fast to develop and deliver leading-edge solutions. Employing package design as part of system innovation requires the STMicroelectronics Back-End Manufacturing Technology R&D organization to embrace the key driving forces of product development. In the automotive field, package designers need to... » read more

Blog Review: Oct. 6


Arizona State University's Jae-sun Seo and Arm's Paul Whatmough introduce a fully-parallel and fully-pipelined FPGA accelerator for sparse CNNs that can eliminate off-chip memory access and also efficiently support elementwise pruning of CNN weights. Cadence's Paul McLellan highlights trends seen at the recent Hot Chips, from machine learning and advanced packaging driving higher performance... » read more

Week In Review: Design, Low Power


Valens Semiconductor began trading on the New York Stock Exchange as VLN after a merger with special-purpose acquisition company (SPAC) PTK Acquisition Corp. Valens offers high-speed connectivity chips for the audio-video and automotive markets, including its HDBaseT technology for connectivity between ultra-HD video sources and remote displays and its in-vehicle high-speed links. The transacti... » read more

Optimizing AI Systems


Inserting AI and machine learning into chips adds a whole new dimension of complexity, and creates a variety of potential problems, including deadlocks, loss of performance, and difficulty in achieving closure on many fronts. Gajinder Panesar, fellow at Siemens EDA, talks with Semiconductor Engineering about what’s changed and how to optimize these new devices and systems by monitoring them f... » read more

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