tag: Siemens EDA

Soft Errors Create Tough Problems
By Ed Sperling - 28 Apr, 2009 - Comments: 0

By Ed Sperling Single event upsets used to be as rare as some elements on the Periodic Table, with the damage they could cause relegated more to theory than reality. Not anymore. At 90nm, what was theory became reality. And at 45nm, the events are becoming far more common, often affecting multiple bits in increasingly dense arrays of memory and now, increasingly, in the logic. Known alter... » read more

Moore’s Law Splinters
By Ed Sperling - 28 Apr, 2009 - Comments: 0

By Ed Sperling Moore’s Law continues progressing at a rate of one node every two years or so, but the number of companies that are adhering to that schedule is becoming much harder to pinpoint. Even the nodes themselves are becoming fuzzy. While Intel is looking at 32nm as the next node after 45nm, TSMC is looking at 28nm as the next node after 40nm. And there are likely to be extensions wi... » read more

Experts At The Table: Platform-Based Design
By Ed Sperling - 23 Apr, 2009 - Comments: 0

By Ed Sperling System-Level Design sat down with Simon Bloch, vice president and general manager of ESL/HDL Design and Synthesis at Mentor Graphics; Mike Gianfagna, vice president of marketing at Atrenta; and Jim Hogan, a private investor. What follows are excerpts of a lively, often contentious two-hour conversation.     SLD: Where does the consolidation happen in the chip design world... » read more

Experts At The Table: Platform-Based Design
By Ed Sperling - 16 Apr, 2009 - Comments: 0

By Ed Sperling System-Level Design sat down with Simon Bloch, vice president and general manager of ESL/HDL Design and Synthesis at Mentor Graphics; Mike Gianfagna, vice president of marketing at Atrenta; and Jim Hogan, a private investor. What follows are excerpts of a lively, often contentious two-hour conversation.   SLD: What’s the starting point for designs in this world? Hogan: I... » read more

Experts At The Table: Platform-Based Design
By Ed Sperling - 09 Apr, 2009 - Comments: 0

By Ed Sperling System-Level Design sat down with Simon Bloch, vice president and general manager of ESL/HDL Design and Synthesis at Mentor Graphics; Mike Gianfagna, vice president of marketing at Atrenta; and Jim Hogan, a private investor. What follows are excerpts of a lively, often contentious two-hour conversation. SLD: Let’s start out with a point of reference before we get going on ... » read more

Taming The Multicore Beast
By Ed Sperling - 27 Mar, 2009 - Comments: 0

By Ed Sperling Multicore chips are here to stay. Now what? That question is echoing up and down the ranks of tools vendors, design engineers, software developers and even among people who measure the performance and efficiency of semiconductors. There is now a Multicore Expo and a Multicore Association that includes a who’s who of electronics. And there are lots of working groups developing... » read more

Thinking Digital To Design Analog, And Vice Versa
By Ed Sperling - 27 Mar, 2009 - Comments: 0

By Ed Sperling Until several years ago, analog was a world apart from digital. Analog engineers could comfortably avoid many of the issues of Moore’s Law, viewing it as a costly bad habit with an equally bad outcome. Most analog engineers gloated privately that they could still develop chips at 250nm, or at worst 130nm, while their digital counterparts were struggling to keep up with is... » read more

Exploring The Use Of Virtual Platforms At The Electronic System Level
By Cheryl Ajluni - 27 Mar, 2009 - Comments: 0

By Cheryl Ajluni System design is hard. That should not come as a surprise to anyone these days. With design geometries shrinking and device complexity on the rise, this fact is not likely to change anytime soon. One concept for easing that burden for system-level designers is the virtual platform. Granted, the concept itself is nothing new, but today it is being employed in ever more creativ... » read more

Trends in System-Level Prototyping
By Various Writers - 27 Mar, 2009 - Comments: 0

By Clive Maxfield One problem with electronics is that certain terms can mean different things, depending on who one is talking to at the time. Even worse, some terms have a tendency to evolve over time. This means that when we are presented with a topic like "Trends in System-Level Prototyping," before leaping headfirst into the fray, it may be a good idea to first define exactly what we mean... » read more

Why bother with ESL?
By Jon McDonald - 26 Mar, 2009 - Comments: 0

I’m in southern California today at the EDA Tech Form. I’ve been thinking about a conversation I had recently with a colleague. He’s been doing system-level modeling for a few years and has been an advocate for transaction-level modeling and ESL in his company. He has had tremendous success in identifying and fixing system-architecture issues before implementation, as well as saving his ... » read more

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