tag: Synopsys

Week In Review: Design, Low Power
By Jesse Allen - 05 Jun, 2020 - Comments: 1

Tools & IP Synopsys introduced its DesignWare USB4 IP solution consisting of controllers, routers, PHYs, and verification IP. It supports USB4, DisplayPort with HDCP 2.3 security, PCI Express, and Thunderbolt 3 connectivity protocols through USB Type-C connectors and cables. The USB4 IP operates at up to 40 Gbps, twice the maximum data rate of USB 3.2, and is backwards compatible with USB 3... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 05 Jun, 2020 - Comments: 0

Edge, cloud, data center Synopsys launched its USB4 IP and tools, already with a successful tapeout of a USB4 PHY test chip on 5nm advanced FinFET process. The Designware USB4 IP’s throughput is up to 20 or 40 Gbps, which Synopsys says is the bandwidth needed for high-performance edge AI, storage, PC, and tablet SoC designs. Also, Samsung Foundry certified Synopsys’ Design Compiler NXT for ... » read more

Faster Formal Verification Closure For Datapaths In AI Designs
By Neelabja Dutta - 04 Jun, 2020 - Comments: 0

In recent years, many longstanding assumptions about formal verification have been rendered obsolete by ever-improving technology. Applications such as connectivity checking have shown that formal can work on large system-on-chip (SoC) designs, not just small blocks. Standard SystemVerilog Assertions (SVA) have eliminated the need to learn an abstruse mathematical language for each new formal t... » read more

Data Strategy Shifting Again In Cars
By Ann Mutschler - 04 Jun, 2020 - Comments: 0

Carmakers are modifying their data processing strategies to include more processing at or near the source of data, reducing the amount of data that needs to be moved around within a vehicle to both improve response time and free up compute resources. These moves are a world away from the initial idea that terabytes of streaming data would be processed in the cloud and sent back to the vehicl... » read more

What Makes A Chip Tamper-Proof?
By Bryon Moyer - 04 Jun, 2020 - Comments: 5

The cyber world is the next major battlefield, and attackers are busily looking for ways to disrupt critical infrastructure. There is widespread proof this is happening. “Twenty-six percent of the U.S. power grid was found to be hosting Trojans," said Haydn Povey, IAR Systems' general manager of embedded security solutions. "In a cyber-warfare situation, that's the first thing that would b... » read more

Neuromorphic Computing Drives The Landscape Of Emerging Memories For Artificial Intelligence SoCs
By Synopsys - 03 Jun, 2020 - Comments: 0

The pace of deep machine learning and artificial intelligence (AI) is changing the world of computing at all levels of hardware architecture, software, chip manufacturing, and system packaging. Two major developments have opened the doors to implementing new techniques in machine learning. First, vast amounts of data, i.e., “Big Data,” are available for systems to process. Second, advanced ... » read more

Blog Review: June 3
By Jesse Allen - 03 Jun, 2020 - Comments: 0

Cadence's Paul McLellan takes a look at how Ethernet came to dominate wired networking and is now taking on automotive to provide the bandwidth necessary for the increasing number of sensors in modern vehicles. Mentor's Colin Walls notes the difficulty of assessing the quality of software, some key areas to pay attention to when assessing quality or trying to write quality code, and the bottom... » read more

The Increasingly Ordinary Task Of Verifying RISC-V
By Ann Mutschler - 03 Jun, 2020 - Comments: 0

As RISC-V processor development matures and its usage in SoCs and microcontrollers grows, engineering teams are starting to look beyond the challenges of the processor core itself. So far, the majority of industry verification efforts have focused on ISA compliance to standardize the RISC-V core. Now the focus is shifting to be how to handle verification as the system grows, especially as this... » read more

High-Speed SerDes At 7/5nm
By Ed Sperling - 02 Jun, 2020 - Comments: 0

Manmeet Walia, senior product marketing manager at Synopsys, talks with Semiconductor Engineering about how to optimize PHYs for integration on all four corners of an SoC, as well as the PPA implications of moving large amounts of data across and around a chip. » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 May, 2020 - Comments: 0

Tools & IP Arm unveiled several new processor IPs. Targeting next-gen smartphones, the Cortex-A78 CPU provides a 20% increase in sustained performance over Cortex-A77-based devices within a 1-watt power budget, and more efficient management of compute workloads and on-device ML. The Mali-G78 GPU provides a 25% increase in performance over the Malti-G77. It supports up to 24 cores and in... » read more

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