tag: Synopsys

The Art Of LP Analog
By Ann Mutschler - 12 Feb, 2015 - Comments: 0

The best way to reduce power in analog chips is to make architectural changes or adopt a new architecture for the individual block. However, there are also some design techniques used to reduce power in analog circuitry. Unlike digital circuitry, which allows an engineer to leverage a low power library and optimize through a constraints file with the EDA software to reduce power, the same do... » read more

Emulation Uses Increase
By Ed Sperling - 12 Feb, 2015 - Comments: 0

For more than two decades, [getkc id="30" comment="emulation"] was a technology in search of a market. While on paper it has always made sense to speed up simulation, using hardware acceleration was so pricey that few companies could justify the cost. Fast-forward to today and emulation is a major contributor to the bottom line at all of the Big Three [getkc id="7" kc_name="EDA"] companies. ... » read more

With Responsibility Comes Power
By Brian Bailey - 12 Feb, 2015 - Comments: 0

The debate continues as to whether [getkc id="106" kc_name="power"] has risen to become a primary design consideration, or if it remains secondary to functionality and performance. What is indisputable is the rise in the importance of both power and energy conservation. As technology improves, additional aspects of the design flow are being affected. With that, the focus for power reduction is ... » read more

Power Management Verification Requires Holistic Approach
By Ann Mutschler - 12 Feb, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss power management [getkc id="10" kc_name="Verification"] issues with Arvind Shanmugavel, senior director, applications engineering at [getentity id="22021" e_name="Ansys-Apache"]; Guillaume Boillet, technical marketing manager at [getentity id="22026" e_name="Atrenta"]; Adam Sherer, verification product management director at [getentity id="22032" e_... » read more

Low Power Trends Toward FinFET
By Mary Ann White - 12 Feb, 2015 - Comments: 0

My previous blog, Power Reduction Techniques, covered which low power techniques were applicable for various process nodes, from larger planar CMOS process technologies through finFET. The 16 and 14nm finFET-based process nodes are moving into production this year, and we are seeing many companies rapidly move their designs to finFET. In my last post, I noted some of the reasons why finFET is s... » read more

Reliability Definition Is Changing
By Ed Sperling - 12 Feb, 2015 - Comments: 0

Since the invention of the integrated circuit, reliability has been defined by how long a chip continues to work. It either turned on and did what it was designed to do, or it didn't. But that definition is no longer so black-and-white. Parts of an SoC, or even an IP or memory block, can continue to function while other parts do not. Some may work intermittently, or at lower speeds. Others may ... » read more

Blog Review: Feb. 11
By Jesse Allen - 11 Feb, 2015 - Comments: 0

Ansys' Bill Vandermark flags the top five engineering articles of the week. Check out the one about the latest attempt at cold fusion, which left researchers hiding behind a blast shield. The solar-powered car named Stella drove away with the prestigious "Best Technology Achievement" award at the 8th annual Crunchies Awards this week. NXP's Maurice Geraets sounds like a proud parent – with... » read more

Advanced Power And Performance Optimization For Multicore SoCs
By Synopsys - 11 Feb, 2015 - Comments: 0

The Multicore Optimization (MCO) technology in Synopsys Platform Architect provides an environment for early exploration and optimization of complex Multicore SoC (MP-SoC) platforms. It allows quantitative analysis of performance and power metrics to avoid SoC market failure due to underperforming or power hungry architectures. To read more, click here. » read more

An Update On The IEEE 1801-2013 Unified Power Format Standard
By Barry Pangrle - 09 Feb, 2015 - Comments: 0

It’s been almost six years since the first IEEE 1801 standard was officially published in March of 2009, but the standard can trace its roots back to years before that date. On May 30, 2013 the IEEE released a press announcement for the most recent version of the standard, IEEE 1801-2013 (a.k.a. UPF 2.1). This brought forward a standard for the industry that is finally backed by all of the ma... » read more

The Week In Review: Design/IoT
By Jesse Allen - 06 Feb, 2015 - Comments: 0

Mergers & Acquistions Silicon Labs acquired Bluegiga Technologies Oy, providers of short-range wireless connectivity solutions and software for the IoT based in Espoo, Finland. Intel signed a definitive agreement to acquire Lantiq, a supplier of broadband access and home networking technologies based in Munich, Germany. Tools Mentor Graphics announced the addition of Automotive ... » read more

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