Synopsys-Coverity Deal Final


Synopsys’ acquisition of Coverity, which makes tools for testing and analyzing software, was made official yesterday. Now what? That may be the $334 million question, which is the price Synopsys paid for the 11-year-old software tools vendor. Even Synopsys’ top executives are rather candid in their uncertainty about where this deal will lead, and they made no qualms about that at the Syn... » read more

Using Virtual Prototypes To Address The Growing Software Complexity In Automotive


The software content is growing steadily across multiple applications and the automotive market is no exception to this. In fact the amount of electronics and software in cars is transforming the way we perceive the value of a car. With this steady increase in software also comes the need to handle the amount and the complexity of all these different software stacks. And unlike other applicatio... » read more

Blog Review: March 26


Synopsys’ Eric Huang has discovered a video of Superman using a GoPro camera (scroll down to bottom of page). So this is what it’s like to stop bullets with your hand. Cadence’s Tom Hackett zeroes in on mobile interfaces in a video—SoC fabric, memory and chip-to-chip. Nice whiteboard drawing. Mentor’s Anil Khanna looks at a methodology for developing high-performance embedded so... » read more

Mentor Buys Berkeley Design


Mentor Graphics announced today that it has acquired Berkeley Design Automation, staking a claim on the expanding market for analog, mixed-signal and RF verification. The deal puts Mentor on firm footing against Synopsys and Cadence, just as the opportunity for the Internet of Things (IoT), including automotive and medical design, begins to show real promise. Until this move, Mentor has larg... » read more

The Week In Review: Design


Tools Mentor Graphics unveiled a new version of its PCB design platform, even going so far as to rename it slightly (Expedition to Xpedition). Mentor claims it’s the most significant product in that space in years, bridging the environments between designers and engineers. Included are placement planning in densely packed boards, which simplifies re-use and improves time to market, and elect... » read more

Enabling Test Portability With Graphs


Is it time to move up again? When it comes to test portability between simulation, emulation, prototypes and silicon, as well as an easier way to create a test structure, the answer appears to be a resounding ‘Yes.’ Looking at these activities from a higher level of abstraction and using a graph-based approach should allow automation where there has been none previously, and could allow val... » read more

Blog Review: March 19


ARM’s Diya Soubra has discovered an interesting term in relation to the Internet of Things: Compound Applications. Will that make the IoT more compelling? Mentor’s Colin Walls points to some less obvious reasons for choosing a processor. No. 4 on his list is particularly noteworthy. Synopsys’ Mick Posner has some thoughts about wearable computing prototypes. Check out the top pho... » read more

Big Shift In SoC Verification


Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

More Pain In More Places


Pain is nothing new in to the semiconductor industry. In fact, the pain of getting complex designs completed on budget, and finding the bugs in those designs, has been responsible for decades of continuous growth in EDA, IP, test, packaging, and foundries. But going forward there is change afoot in every segment of the flow from architecture to design to layout to verification to manufacturi... » read more

The Week In Review: Design


Tools Synopsys uncorked the next version of its verification tool, which includes static and formal verification, new debug capabilities, and low-power and X-propagation simulation. The company says the new tool offers up to 5X performance improvement. Cadence rolled out a new version of its verification solution for designs using ARM’s interconnect IP, speeding up verification and analys... » read more

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