tag: test

Metrology’s Growing Role In Reducing False Defects
By Gregory Haley - 14 Oct, 2025 - Comments: 0

When a good die fails test and gets scrapped, often no one notices, because false failures look identical to real ones. Yet across the industry, these phantom defects are quietly eroding yield, inflating test costs, and masking the true health of manufacturing processes. At advanced nodes and in heterogeneous packaging, where margins are already razor-thin, even minor variations in contact r... » read more

Rethinking Security In Semiconductor Testing: Why Containment Is The New Imperative
By Arik Peltz - 14 Oct, 2025 - Comments: 0

It’s nearly impossible to keep up with the headlines without stumbling upon another major cybersecurity incident. According to recent reports, 2024 witnessed a staggering 5.5 billion breaches globally. In the United States alone, the average cost of a single data breach clocked in at $9.36 million—slightly lower than 2023’s figure, but still a significant hit for any organization. On a gl... » read more

Silicon Lifecycle Management
By Ed Sperling - 22 Sep, 2025 - Comments: 0

How chips are used is changing, and so are the requirements. In the past, markets were largely segmented by application, which determined how chips were designed. High-performance processors went into notebook computers, low-power chipsets were deployed in mobile devices, and complex SoCs and advanced packages were used in data centers. But with the spread of AI everywhere, traditional segmenta... » read more

Case Study: Production Yield And Throughput Improvement Using The Known Good Socket Analysis
By Jesse Ko - 09 Sep, 2025 - Comments: 0

The test sockets, which are crucial components that directly interface with semiconductor IC packages, have a profound impact on device testing performance. Pins with high CRES not only cause false failures in the test but also lower bin grading results, which in turn increase the manufacturing cost due to reduced production performance. The ever-increasing demand driven by high-performance com... » read more

The Hidden Cost Of Contact Resistance
By Gregory Haley - 09 Sep, 2025 - Comments: 1

Contact resistance, or CRES, is one of those problems that most engineers prefer not to think about until it's staring them in the face. For years, it could be managed quietly with routine probe card cleaning or a scheduled socket swap. That approach worked well enough when pin counts were lower and devices pulled less current, but the ground has shifted since then. Today’s AI processors m... » read more

Data Feed Forward And How It Works: Part 2
By Roberto Colecchia - 09 Sep, 2025 - Comments: 0

As chiplets and advanced packaging redefine semiconductor architecture, managing complexity isn’t just about the silicon—it’s about the data. Modern multi-die packages often contain components from different vendors, integrated in 2.5D or 3D configurations. Each die brings its own risks, and diagnosing issues after assembly is increasingly difficult—especially when data isn’t share... » read more

How Guardbanding Of Inline Wafer Defects Can Improve Chip Reliability Insurance
By Errol Akomer - 21 Aug, 2025 - Comments: 0

Partially defective, marginal die can still be functional enough to pass final electrical test. Some of these “walking wounded” chips get past final testing, but in the customer's end product, under ongoing stress, they may fail. This is a particularly serious issue with automotive, medical and other customers who demand maximum long-term device reliability. The semiconductor industry ha... » read more

Advanced Electrical Test Capability For Better Defect Signature Detection In Advanced Package Development
By Jesse Ko - 12 Aug, 2025 - Comments: 0

As the semiconductor world excitingly explores the potential of new advanced package solutions for their intricate and novel designs, challenges arise from undetected defects caused by the complexity of the designs and the lack of accessibility to the interconnects for testing. This typically results in a long cycle time to achieve yield entitlement. Undetected defects at the development stage ... » read more

Data Feed Forward And How It Works: Part 1
By Roberto Colecchia - 12 Aug, 2025 - Comments: 0

With data analytics, manufacturers can gain unparalleled insights into their testing processes, identify patterns, predict failures, and optimize operations. From improving yield rates to reducing testing costs, data analytics not only enhance the quality of semiconductor devices but also drives innovation and competitiveness in the industry. Traditionally, data analytics has been performed ... » read more

Test Hyperconvergence In Semiconductor Development
By Pawini Mahajan - 12 Aug, 2025 - Comments: 0

Back when semiconductor devices contained only a few thousand gates, manufacturing test was almost an afterthought. The development team threw the chip “over the wall” to the test engineers, who developed a set of test patterns for the manufacturing floor. As this process became more automated and chips became more complicated, test considerations crept into the development flow and design-... » read more

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