Information Flow Verification Framework Integrating Static and Formal Verification Methods At The Pre-Silicon Stage (U. of Florida)


Researchers from University of Florida published "IFV: Information Flow Verification at the Pre-silicon Stage Utilizing Static-Formal Methodology." Abstract "Modern system-on-chips (SoCs) are becoming prone to numerous security vulnerabilities due to their ever-growing complexity and size. Therefore, a comprehensive security verification framework is needed at the very early stage of the ... » read more

Chip Industry Technical Paper Roundup: Jan. 27


New technical papers recently added to Semiconductor Engineering’s library: [table id=517 /] Find more semiconductor research papers here. » read more

Confidentiality-preserving Framework For Secure On-Chip Communication in NoC Architectures


A new technical paper, "Secure Multi-Path Routing with All-or-Nothing Transform for Network-on-Chip Architectures," was published by researchers at University of Florida. Abstract "Ensuring Network-on-Chip (NoC) security is crucial to design trustworthy NoC-based System-on-Chip (SoC) architectures. While there are various threats that exploit on-chip communication vulnerabilities, eavesdrop... » read more

A Verification Framework For Trojan Detection (U. of Kansas, U. of Florida)


A new technical paper "COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events" was published by researchers at University of Kansas and University of Florida. Abstract "Commercial Off-The-Shelf (COTS) hardware, such as microprocessors, are widely adopted in system design due to their ability to reduce development time and cost compared to custom ... » read more

Chip Industry Week in Review


Government funding/defunding NIST is terminating funding for the SMART USA Institute, a CHIPS Act research center focused on digital twins, prompting congressional concern that the decision disrupts active awards and weakens U.S. semiconductor R&D commitments. Korea Zinc was awarded $210M in CHIPS Act funding towards a new $6.6B Tennessee advanced smelter and minerals processing facility,... » read more

Chip Industry Technical Paper Roundup: Dec. 8


New technical papers recently added to Semiconductor Engineering’s library: [table id=499 /] Find more semiconductor research papers here and in the most recent Chip Industry Week in Review.   » read more

Verification and Reliability Methods For RRAM-Based Computing-in-Memory (Univ. of Bremen et al)


A new technical paper titled "Special Session Paper: Formal Verification Techniques and Reliability Methods for RRAM-based Computing-in-Memory" was published by researchers at University of Bremen, DFKI GmbH, University of Florida and TU Munich. Abstract "Computing-in-memory (CIM) has gained immense traction owing to the benefits it provides in power, performance, and area. CIM can be don... » read more

Chip Industry Technical Paper Roundup: Dec. 2


New technical papers recently added to Semiconductor Engineering’s library: [table id=497 /] Find more semiconductor research papers here. » read more

Chip Industry Week In Review


Breaking news: Nvidia and Synopsys announced a multi-faceted, multi-year deal that includes everything from digital twins to CUDA programming, engineering, and marketing collaboration, and Nvidia's $2B purchase of Synopsys stock. [Updated 12/1] Memory news: Micron is building a $9.6B HBM facility in the city of Higashi-Hiroshima Japan, reports Nikkei. China's ChangXin Memory Technol... » read more

Leveraging NEMS To Address Critical Hardware Security Challenges In Advanced Packaging (U. of Florida)


A new technical paper titled "Nanoelectromechanical Systems (NEMS) for Hardware Security in Advanced Packaging" was published by researchers at University of Florida. Abstract "As hardware security threats escalate across semiconductor manufacturing and advanced packaging, there is a growing need for novel physical mechanisms to counter sophisticated attacks such as tampering, counterfeit... » read more

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