Understanding Process And Design Systematics


As design rules shrink, semiconductor manufacturing becomes more complex which leads to a huge increase in the defects which could cause a non-yielding die. Process control and inline defect analysis becomes widely relevant to help shorten the learning process from R&D to production. This paper discusses the various methodologies which leverage patterned wafer inspection tools to help analyze d... » read more

Speeding Up E-beam Inspection


Wafer inspection, the science of finding killer defects in chips, is reaching a critical juncture. Optical inspection, the workhorse technology in the fab, is being stretched to the limit at advanced nodes. And e-beam inspection can find tiny defects, but it remains slow in terms of throughput. So to fill the gap, the industry has been working on a new class of multiple beam e-beam inspectio... » read more

Flash Dance For Inspection And Metrology


Chipmakers are moving from planar technology to an assortment of 3D-like architectures, such as 3D NAND and finFETs For these devices, chipmakers face a multitude of challenges in the fab. But one surprising and oft-forgotten technology is emerging as perhaps the biggest challenge in both logic and memory—process control. Process control includes metrology and wafer inspection. Metrolo... » read more

Maglen: Multi-Beam E-Beam Inspection


Wafer inspection, the science of finding defects on a wafer, is becoming more challenging and costly at each node. In fact, the ability to detect sub-30nm defects is challenging with today’s inspection tools, which are primarily based on two separate technologies—optical and e-beam. In the inspection flow, chipmakers first use e-beam inspection, mainly for engineering analysis. E-beam is... » read more

Wanted: Multi-beam E-Beam Inspection


The IC industry is making a giant leap from planar devices to a range of next-generation architectures, such as 3D NAND and finFETs. But it’s taking longer than expected to ramp up these new technologies in the market. And the challenges are expected to mount for the next round of chips. It’s difficult to pinpoint the exact issues with 3D NAND and finFETs. On the manufacturing front alo... » read more

Wanted: New Metrology Funding Models


By Mark LaPedus The shift toward the 20nm node and beyond will require new and major breakthroughs in chip manufacturing. Most of the attention centers around lithography, gate stacks, interconnects, strain engineering and design-for-manufacturing (DFM). Lost in the conversation are two other critical but overlooked pieces in the manufacturing puzzle—wafer inspection and metrology. ... » read more

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