The datamodel and rethinking of the entire library and design paradigm reduces memory, provides massively improved throughput, and reduced turnaround times.
By Rajiv Dave, CAE Manager, Synopsys.
Design exploration and planning is becoming an increasingly critical step of the design creation process as growing constraints and requirements are placed upon it. IC Compiler II has been architected from the ground up with the express focus to address the three key challenges of design planning:
IC Compiler II’s ability to handle design capacity by intelligently utilizing the right data at the right time delivers a fully scalable design planning solution. The datamodel and rethinking of the entire library and design paradigm not only serves to meet the goals of reduced memory but also provides massively improved throughput with associated reduced turnaround times.
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