Blog Review: July 1

Cadence’s Krunal Patel highlights auto-negotiation, a foundational feature in Ethernet that allows two connected devices to automatically determine the best possible operating parameters for a link, eliminating manual configuration and ensuring optimal performance.

Synopsys’ Sumit Vishwakarma warns of the rising cost of overdesign, particularly in advanced node and multi-die designs, and how an integrated multiphysics approach with better context and stronger correlation within existing workflows can help inform architectural decisions.

Siemens’ Stephen V. Chavez stresses the importance of effective design reuse and IP management that, rather than simply copying circuitry from previous projects, encompasses systematic capture, validation, management, and deployment of proven engineering knowledge across an organization.

Arm’s Matthew Crouch provides a guide to on-device LLM quantization techniques for mobile AI, including why not all quantization methods are equally practical for mobile deployment, a comparison of different approaches, and Gemma benchmark results on mobile CPUs.

Lam Research’s Assawer Soussou explores how to create a realistic virtual model of the connection between nano-TSVs and buried power rails used in backside power delivery networks.

Keysight’s Eric Yu warns that oversimplification of network congestion in AI data centers, or treating it like regular web traffic, can cost millions of dollars in wasted GPU compute and suggests ways to identify and remedy problems.

Agileo Automation’s Fahad Golra identifies five practical pillars around which the future of cybersecurity in semiconductor manufacturing will likely be built: operational validation, structured cybersecurity evidence, communication security, lifecycle management, and risk-based compliance.

And don’t miss the blogs featured in the latest Systems & Design newsletter:

Technology editor Brian Bailey considers what may be the largest disturbance in the role of a verification engineer since the founding of the industry.

Synopsys’ Frank Schirrmeister questions when verification should begin if it’s never fully complete.

Siemens EDA’s Keith Felton explains why system-centric co-design is essential for heterogeneously integrated packages.

Arteris’ André Bonnardot discusses how last-level cache helps manage data movement and reduces pressure on external memory subsystems.

Baya Systems’ Nandan Nayampally outlines what’s needed to keep data movement in sync with processors.

Cadence’s Antti Lautanen finds tokens-per-watt is now the primary metric driving AI data center optimization.

ChipAgents’ Tanay Biradar, Surya Gunukula, Tengxiao Liu, and Kexun Zhang look at the critical limitations of existing models and how to overcome them.

Keysight’s Kwan Wee Lee explains how to avoid synchronization and concurrency issues that commonly appear in multi-DUT systems.