Blog Review: May 13

Siemens’ Loay Hegazy, Mohamed Taher, and Sherif Hammouda describe a GPU rasterizer designed specifically for computational lithography and present benchmark results and practical implications for mask synthesis workflows.

Cadence’s Udaya Shankar introduces RTL, logic, and physical restructuring techniques and how they can help improve PPA, reduce dynamic power consumption, and optimize placement, routing, and connectivity.

Synopsys’ Dana Neustadter focuses on the need for inline memory encryption to ensure that even if an attacker can probe, tamper with, or extract bits from DRAM, the information they obtain is unintelligible.

Keysight’s Majid N. Aziz explores how a car’s electronic stability program helps keep it stable during sudden maneuvers and how simulation can shift ESP development from reactive validation to proactive design.

Arm’s Volodymyr Turanskyy and associates check out what’s new in the LLVM 22 release, from additional architecture and CPU support to performance and code generation improvements.

SEMI’s Anshu Bahadur, Karim Somani, and Paul Carey highlight how edge AI, smart sensors, and advanced connectivity are transforming process control, yield enhancement, tool coordination, and predictive maintenance.

Plus, check out the blogs featured in the latest Automotive, Security & Edge AI and Test, Measurement & Analytics newsletters:

Synopsys’ Marc Serughetti explains why it’s no longer sufficient to simulate a physical vehicle or subsystem.

Rambus’ Berardino Carnevale examines a security model where every chiplet can prove identity, boot correctly, and communicate securely without becoming the weak link.

Siemens EDA’s Muhammad Hassan and Sudarshan Deo look at how connectivity density and power delivery complexity have made power integrity one of the most critical constraints in modern system design.

Keysight’s Jasper van Woudenberg digs into a framework that establishes concrete device-specific security requirements upfront and verifies them at the end.

Cadence’s Reela Samuel examines balancing performance, manufacturability, cost, and thermal efficiency in ways neither traditional planar designs nor purely vertical stacks can.

Infineon’s Paul Wiener explains how a common metric overlooks the energy wasted by inefficient server AC/DC power conversion.

Synaptics’ Neeta Shenoy checks out the design of AI-guided, patient-operated home ultrasound probes that can produce a reliable medical image.

Imagination’s Tyrran Ferguson looks at the evolution of game engines, the realities of mobile performance, and what GPU vendors need to deliver to support the next generation of developers.

PDF Solutions’ Greg Prewitt and Marc Jacobs discuss how the industry’s machine learning aspirations are running ahead of the data plumbing needed to support them.

Onto Innovation’s Christopher Haire explains why ensuring the physical properties that matter most in specialty devices are tightly understood and controlled.

Synopsys’ Guy Cortez and Maheshwaran Jothi dig into analytics-driven yield diagnostics and failure analysis integration for advanced-node devices.

Advantest’s Fabio Pizza details the evolution of ATE from a pure defect-detection system to one that provides system-level validation supported by AI software tools.

proteanTecs’ Noam Brousard shows how in-chip monitoring restores trust through predictive maintenance that can identify and correct silent data errors in real time.

Teradyne’s Aik-Moh Ng explains why next-gen AI architectures demand purpose-built power test systems.

Nordson’s Chris Rand contends that the chip industry needs to focus on regional capability in light of rising supply chain risk and geopolitical uncertainty.

Siemens’ Mike Sharp shows how on-chip instrumentation and a host-side software framework shorten the path from first silicon to actionable debug data.