AI Meets Device Modeling: Transforming Compact Modeling With Machine Learning


As semiconductor technologies advance, device structures are becoming increasingly complex. New materials and architectures introduce intricate physical effects requiring accurate modeling to ensure reliable circuit simulation and design. Correspondingly, these accuracy requirements raise demands on the accuracy and efficiency of device modeling. Modern device models often involve hundreds o... » read more

Verification Fails To Keep Up


Experts at the table: Semiconductor Engineering sat down to discuss the state of functional verification with Mohan Dhene, director for architecture and design at Alphawave Semi; Andy Nightingale, vice president for product management and marketing at Arteris; Dinesha Rao, senior group director for software engineering at Cadence; Chris Mueth, new opportunities business manager at Keysight; Gor... » read more

A Smarter Path To Chiplets Through An Enhanced Multi-Die Solution


The rise of artificial intelligence (AI) is advancing at breakneck speed, pushing computing demands. At the same time, Moore’s Law slows, making monolithic devices increasingly cost-prohibitive and harder to scale. As traditional monolithic scaling hits the wall, the solution is to disaggregate the design into multiple dies, known as chiplets. These chiplets are mounted on a common substrate ... » read more

A Signal Integrity Guide to HSD PCB Design


As data rates soar into the multi-gigabit range, high-speed digital (HSD) PCB design is no longer just about connecting the dots. Signal integrity (SI) and power integrity (PI) challenges can silently destroy performance—long before your board even hits the lab. This comprehensive guide is your blueprint for mastering SI fundamentals in complex, high-speed PCB systems. From PCIe and DDR t... » read more

6G System Design: Realistic Modeling, Simulation and Verification of Next Generation Wireless Systems


As 6G envisions the convergence of ultra-fast communications, integrated sensing, and native AI capabilities across diverse environments — including terrestrial, aerial, and satellite domains — SystemVue emerges as a high-fidelity RF digital twin environment. It bridges the gap between the initial design and development and physical-layer hardware by accurately modeling RF impairments, phas... » read more

A Quantum Leap in Architecture Design of Chiplet Cache Systems


CacheStudio is a rapid architecture and design platform for chiplet based cache coherent systems. Cache hierarchies and parameters are specified in minutes with an abstract Python front end, and accurate workload driven simulations are performed at millions of instructions per second to uncover stateful performance indicators that require long runtimes. The results are presented interacti... » read more

Blog Review: August 27


Cadence's Pamula Sai Srinivas explains why clock tree synthesis is essential to ensuring that the clock signal is distributed in a way that helps achieve timing closure and maintain synchronization, performance, and reliability. Synopsys' Sajani Patel, Varun Agrawal, and Manuel Mota check out what's new in UCIe 3.0, including doubling the maximum data rate to 64 GT/s, runtime recalibration, ... » read more

Benchmark Before You Build


Traditional verification methods, static analysis, RTL simulation and emulation have long depended on constrained-random or targeted test suites to confirm that a design operates as intended. However, none of these approaches accurately reproduce how real users will interact with the silicon once it’s deployed in phones, datacenters, or embedded systems. To stay competitive, the semiconductor... » read more

Making SoC Integration Simple – Achieve Higher Productivity and Quality


The development of large-scale semiconductors has never been a simple task, but with the development of ever more powerful computers, software environments, and verification models, the task of designing cutting-edge chips becomes far more manageable. However, now that many chips being developed are utilizing as many as 1000 IP cores, the challenges of correctly connecting these modules togethe... » read more

Blog Review: August 20


Cadence's Sriram Sharma Kalluri finds that time-of-flight sensors are poised to revolutionize ADAS by generating precise 3D point clouds that, particularly when combined with lidar, contribute to an exceptionally accurate and comprehensive understanding of the vehicle's surroundings. Synopsys' Igor Markov and other industry experts discuss how quantum computing is moving from research to p... » read more

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