category: System-Level Design

category: Auto, Security & Edge AI

Gaps In The Verification Flow
By Brian Bailey - 29 Sep, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the functional verification flow with Stephen Bailey, director of emerging companies at [getentity id="22017" e_name="Mentor Graphics"]; [getperson id="11079" comment="Anupam Bakshi"], CEO of [getentity id="22168" e_name="Agnisys"]; [getperson id="11124" comment="Mike Bartley"], CEO of [getentity id="22868" e_name="Test and Verification... » read more

Designers: Take Control Of Your Chip
By Mike Gianfagna - 29 Sep, 2016 - Comments: 0

This is a familiar story for us – maybe it is for you, too. From time to time, a customer contacts us and says they have a design in mind, but they just can’t fit in the package, or meet the power budget, or meet timing. Fifty percent or more of the area for many of the chips we see is composed of memory. So we start there. After a Pareto analysis of the memory sub-system, we typically find... » read more

How High-Level Synthesis Was Used To Develop An Image-Processing IP Design From C++ Source Code
By Cadence - 28 Sep, 2016 - Comments: 0

Imagine working long and hard on a design, only to learn that you need to add new (and more complex) functionality a few months before your targeted tapeout. How can you deliver the performance and capabilities expected in the same timeframe? For Bosch, high-level synthesis (HLS) provided the solution. In this paper, we will discuss how HLS technology enabled the team to meet an aggressive sche... » read more

Analog Fault Simulation Challenges And Solutions
By Mentor, a Siemens Business - 28 Sep, 2016 - Comments: 0

The test time for digital circuit blocks in ICs has greatly decreased in the last 20 years, thanks to scan-based design-for-test (DFT), automatic test pattern generation (ATPG) tools, and scan compression. These technologies have greatly reduced the number of test vectors applied by automatic test equipment (ATE) while maximizing the coverage of a wide range of defect types. But for analog c... » read more

ARM Cortex-A32 – The Logical Choice For Rich Embedded
By Arm - 28 Sep, 2016 - Comments: 0

The whitepaper explains how the ARM Cortex-A32 processor is an ideal stepping stone into the Cortex-A family for traditional Cortex-M products that can benefit from a richer operating system environment, or from the additional performance and features that Cortex-A processors can provide. The paper details the enhancements of the Cortex-A32 and draws architectural comparisons to the features... » read more

Development Testing For C# Applications
By Synopsys - 28 Sep, 2016 - Comments: 0

Static analysis shouldn’t be about finding loads of coding style or standard issues. It should be focused on finding the most critical defects. Although traditional byte code analysis solutions such as FxCop are useful, they can miss critical, crash causing defects - plus produce a large set of coding style issues, which can slow down the development team. Learn how the Coverity Development T... » read more

Blog Review: Sept. 28
By Jesse Allen - 28 Sep, 2016 - Comments: 0

Cadence's Paul McLellan provides a glimpse of TSMC's roadmap, including what to look for at 7nm, low-power processes, and the ecosystem around the process. Mentor's Stephen Pateras notes that throughout the evolution of DFT, two rules for success have persisted. Early analysis suggests the largest DDoS attack in history, targeted at security reporter Brian Krebs, may have leveraged flaws ... » read more

System Bits: Sept. 27
By Ann Mutschler - 27 Sep, 2016 - Comments: 0

Memory management scheme accommodates commercial chips In an improvement to a memory management scheme presented last year in which MIT Computer Science and Artificial Intelligence Laboratory researchers unveiled what they said was a fundamentally new way of managing memory on computer chips — one that would use circuit space much more efficiently as chips continue to comprise more and more... » read more

The Week In Review: Design
By Jesse Allen - 23 Sep, 2016 - Comments: 0

Tools Real Intent updated its Ascent Lint product, adding 50 new customer-driven rules, improved support of VHDL and System Verilog, and a new database-driven debugger with an integrated source browser and improved schematic visualization. IP ARM launched a new real-time processor with advanced safety features for autonomous vehicles and medical and industrial robots. The processor, Co... » read more

Blog Review: Sept. 21
By Jesse Allen - 21 Sep, 2016 - Comments: 0

Mentor's Ricardo Anguiano takes a look at a proposal to prevent auto accidents from becoming pile-ups: the relaying of hazard information to the cloud and on to upcoming vehicles. Why get rid of 3.5mm audio jacks? Synopsys' Michael Posner says it's all about the power optimization in the upcoming USB Type-C digital audio specification. NXP's Anand Kannan also thinks Type-C should be the d... » read more

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