category: System-Level Design

category: Auto, Security & Edge AI

Foundries Versus OSATs
By Ed Sperling - 24 Jul, 2014 - Comments: 2

Since the 1990s, commercial foundries have ruled semiconductor manufacturing while the [getkc id='83' comment='OSAT'] providers (OSATs) have dominated IC packaging and testing. But as the industry moves toward stacked die over the next couple of years, and big foundries see a chance to expand their reach, the stage is set for an all-out war. There is much at stake on both sides. Foundries g... » read more

Reversing Course, With A Twist
By Brian Bailey - 24 Jul, 2014 - Comments: 1

Semiconductor Engineering is running an extended series of articles that examine the assertion that the end of Moore’s Law will have profound implications for the entire semiconductor, EDA and IP industries. Part one of this article, which focuses on the EDA industry, addressed the question about who was going to pay for future development of EDA tools for the latest production nodes. The ind... » read more

Solving A Problem In Reverse
By Brian Bailey - 24 Jul, 2014 - Comments: 0

It has been a while since I selected a [getkc id="16" comment="patent"] just because of the humorous side it presents. Today, I will remedy that and talk about a patent that would appear to solve exactly the opposite problem that most people have. It is related to the use of chopsticks. While I am fairly dexterous at using them these days, there was a time when the food would be cold before I h... » read more

The Agony Of Hardware-Assisted Development Choices
By Frank Schirrmeister - 24 Jul, 2014 - Comments: 0

“When defining a product, if you haven’t upset at least one part of the organization, then the product is probably ill defined and tries to address too many things!” That’s what one of my mentors taught me early on in my career as product manager. Ever since then I have been interested in portfolio management. The most recent announcement that we made on the Protium Rapid Prototyping Pl... » read more

Executive Insight: Satish Bagalkotkar
By Ed Sperling - 23 Jul, 2014 - Comments: 1

Semiconductor Engineering sat down with Satish Bagalkotkar, president and CEO of design services company Synapse Design to talk about massive shifts in the semiconductor industry and his vision of how these changes will alter the landscape, from chipmakers to design services to what gets built and how it will get used. What follows are excerpts of that interview. SE: What worries you most? ... » read more

Interpreting UPF For A Mixed-Signal Design Under Test
By Mentor, a Siemens Business - 23 Jul, 2014 - Comments: 0

This paper describes a methodology (as implemented in the Mentor Graphics Questa ADMS mixed-signal simulator) for interpreting the Unified Power Format (UPF) for analog mixed-signal designs coded in Verilog-AMS, VHDL-AMS, or SPICE. No changes to the UPF syntax or file are required. A complete implementation and a demonstration of its use in a sample case are provided as proof of concept. To ... » read more

Blog Review: July 23
By Ed Sperling - 23 Jul, 2014 - Comments: 0

Mentor’s John Day says that within the decade you will be able to contact a real person from your car. Hopefully that doesn't mean marketing people will be able to contact you while you’re stuck in traffic. Cadence’s Brian Fuller says the future of EDA in the automotive market isn’t just about chips. Think security, software and cost reduction. It’s not just SoCs that are going ... » read more

More Effective Test: Slack-Based Transition Delay
By Synopsys - 23 Jul, 2014 - Comments: 0

Semiconductor companies have come to rely on delay testing to attain high defect coverage of manufactured digital integrated circuits (ICs). Delay testing uses transition delay (TD) patterns created by automatic test pattern generation (ATPG) tools to target subtle manufacturing defects in fabricated designs. Although standard TD testing improves defect coverage beyond levels stuck-at patterns ... » read more

System Bits: July 22
By Ann Mutschler - 22 Jul, 2014 - Comments: 0

All graphene is not the same Widely touted as the most electrically conductive material ever studied, researchers at the University of Pennsylvania now understand that all graphene is not the same. With so few atoms comprising the entirety of the material, the arrangement of each one has an impact on its overall function. The team has used an advanced microscope to study the relationship be... » read more

Where Do We Stand With CDC?
By Ann Mutschler - 18 Jul, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss where the industry stands on clock domain crossing with Charlie Janac, CEO of Arteris; Shaker Sarwary, VP of Formal Verification Products at Atrenta; Pranav Ashar, CTO at Real Intent; and Namit Gupta, CAE, Verification Group at Synopsys. What follows are excerpts of that conversation. SE: What are the biggest use models for CDC verification today... » read more

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