category: Technical Papers

category: IoT, Security & Automotive

Electrically Controlled All-AFM Tunnel Junctions on Silicon with Large Room-Temperature Magnetoresistance (Northwestern)
By Technical Paper Link - 02 Apr, 2024 - Comments: 0

A new technical paper titled "Electrically Controlled All-Antiferromagnetic Tunnel Junctions on Silicon with Large Room-Temperature Magnetoresistance" was published by researchers at Northwestern University, Universitat Jaume, California State University Northridge, Argonne National Lab, Politecnico diBari, and University of Messina. Abstract "Antiferromagnetic (AFM) materials are a pathway... » read more

New Memory Architecture For Local Differential Privacy in Hardware
By Technical Paper Link - 02 Apr, 2024 - Comments: 0

A technical paper titled "Two Birds with One Stone: Differential Privacy by Low-power SRAM Memory" was published by researchers at North Carolina State University, University of South Alabama, and University of Tennessee. Abstract "The software-based implementation of differential privacy mechanisms has been shown to be neither friendly for lightweight devices nor secure against side-channe... » read more

Optimizing Event-Based Neural Network Processing For A Neuromorphic Architecture
By Technical Paper Link - 28 Mar, 2024 - Comments: 0

A new technical paper titled "Optimizing event-based neural networks on digital neuromorphic architecture: a comprehensive design space exploration" was published by imec, TU Delft and University of Twente. Abstract "Neuromorphic processors promise low-latency and energy-efficient processing by adopting novel brain-inspired design methodologies. Yet, current neuromorphic solutions still str... » read more

Verifying Hardware CWEs in RTL Designs Generated by GenAI
By Technical Paper Link - 27 Mar, 2024 - Comments: 0

A new technical paper titled "All Artificial, Less Intelligence: GenAI through the Lens of Formal Verification" was published by researchers at Infineon Technologies. Abstract "Modern hardware designs have grown increasingly efficient and complex. However, they are often susceptible to Common Weakness Enumerations (CWEs). This paper is focused on the formal verification of CWEs in a dataset... » read more

DRAM Cache for GPUs With SCM And High Bandwidth
By Technical Paper Link - 26 Mar, 2024 - Comments: 0

A new technical paper titled "Bandwidth-Effective DRAM Cache for GPUs with Storage-Class Memory" was published by researchers at POSTECH and Songsil University. Abstract "We propose overcoming the memory capacity limitation of GPUs with high-capacity Storage-Class Memory (SCM) and DRAM cache. By significantly increasing the memory capacity with SCM, the GPU can capture a larger fraction o... » read more

Superconducting Qubits Made Using Industry-Standard, Advanced Semiconductor Manufacturing (imec, KU Leuven)
By Technical Paper Link - 25 Mar, 2024 - Comments: 0

A new technical paper titled "High-coherence superconducting qubits made using industry-standard, advanced semiconductor manufacturing" was published by researchers at imec and KU Leuven. Abstract: "The development of superconducting qubit technology has shown great potential for the construction of practical quantum computers. As the complexity of quantum processors continues to grow, the ... » read more

Designing AI Hardware To Deal With Increasingly Challenging Memory Wall (UC Berkeley)
By Technical Paper Link - 25 Mar, 2024 - Comments: 0

A new technical paper titled "AI and Memory Wall" was published by researchers at UC Berkeley, ICSI, and LBNL. Abstract "The availability of unprecedented unsupervised training data, along with neural scaling laws, has resulted in an unprecedented surge in model size and compute requirements for serving/training LLMs. However, the main performance bottleneck is increasingly shifting to memo... » read more

Optimizing Quantum Gates For Error Correction in Superconducting Qubits (Google AI)
By Technical Paper Link - 25 Mar, 2024 - Comments: 0

A new technical paper titled "Optimizing quantum gates towards the scale of logical qubits" was published by researchers at Google AI and UC Riverside. Abstract "A foundational assumption of quantum error correction theory is that quantum gates can be scaled to large processors without exceeding the error-threshold for fault tolerance. Two major challenges that could become fundamental road... » read more

HW Implementation of Memristive ANNs
By Technical Paper Link - 22 Mar, 2024 - Comments: 0

A new technical paper titled "Hardware implementation of memristor-based artificial neural networks" was published by KAUST, Universitat Autònoma de Barcelona, IBM Research, USC, University of Michigan and others. Abstract: "Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units oper... » read more

Hardware Trojans: CPU-Oriented Trojan Trigger Circuits (Georgia Tech)
By Technical Paper Link - 22 Mar, 2024 - Comments: 0

A new technical paper titled "Towards Practical Fabrication Stage Attacks Using Interrupt-Resilient Hardware Trojans" was published by researchers at Georgia Tech. The paper states: "We introduce a new class of hardware trojans called interrupt-resilient trojans (IRTs). Our work is motivated by the observation that hardware trojan attacks on CPUs, even under favorable attack scenarios (e.g.... » read more

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