category: Top Stories

category: Auto, Security & Edge AI

What’s Next For Memory?
By Mark LaPedus - 14 Aug, 2014 - Comments: 4

Apple, Samsung and others are developing the next wave of smartphones and tablets. OEMs want to integrate new memory schemes that provide more bandwidth at lower power. But there are some challenges in the arena that are prompting memory makers to rethink their mobile DRAM roadmaps. The conventional wisdom was that memory makers would ship mobile DRAMs based on the new LPDDR4 interface stand... » read more

Who’s Winning The FinFET Foundry Race?
By Mark LaPedus - 14 Aug, 2014 - Comments: 5

The leading-edge foundry business is challenging. For starters, foundry vendors require vast resources, gigantic fabs and lots of know-how. And yet, it’s still difficult to make money in this business. That has certainly proven to be the case in the planar transistor era, but the challenges and costs are escalating as foundry vendors begin to ramp up finFET technologies at the 16nm/14nm no... » read more

Executive Insight: Gideon Wertheizer
By Ed Sperling - 13 Aug, 2014 - Comments: 0

SE: From your standpoint, what’s the next big thing? Wertheizer: The industry was driven in the past few years by the structure the smartphone created. It looks like this area is about to grow. What’s changing is the integration of the smartphone with other applications. The smartphone is now a hub of entertainment and productivity with many devices connecting directly or indirectly to i... » read more

Executive Insight: Taher Madraswala
By Ed Sperling - 11 Aug, 2014 - Comments: 1

Semiconductor Engineering sat down with Taher Madraswala, president of Open-Silicon, to talk about future challenges, opportunities and changes. What follows are excerpts of that interview. SE: What worries you most? Madraswala: What worries me at the industry-level is the growing effect that business constraints are having on product innovation. We’ve done a very good job of advancing ... » read more

IP Reaches Back To Established Nodes
By Ann Mutschler - 07 Aug, 2014 - Comments: 0

Driven by the [getkc id="76" kc_name="IoT"] and wearable market opportunity, [getkc id="81" kc_name="SoC"] developers are shifting backward to established nodes, and what is learned at the leading-edge nodes is being leveraged in reverse as IP is ported backward to improve functionality. [getkc id="43" kc_name="IP"] certainly can be improved to work faster at older geometries, stressed Krish... » read more

When Will 2.5D Cut Costs?
By Brian Bailey - 07 Aug, 2014 - Comments: 2

There is a constant drive to reduce costs within the semiconductor industry and, up until now, [getkc id="74" comment="Moore's Law"] provided an easy path to enable this. By adopting each smaller node, transistors were cheaper, but that is no longer the case, as explained in a recent article. The industry will need to find new technologies to make this happen and some people are looking towards... » read more

Making Software Better
By Ed Sperling - 07 Aug, 2014 - Comments: 0

Gauging the energy efficiency of software is a difficult task. There are many types of software, from embedded code all the way up to software that controls various modes of operation to downloaded applications. Some software interacts with other software, while other software works independently. And some works better on one SoC configuration than another, or on one iteration of an operating s... » read more

Changing The IP Supplier Paradigm
By Brian Bailey - 07 Aug, 2014 - Comments: 1

Just a few years ago, the [getkc id="43" comment="Intellectual Property"] (IP) business consisted of small blocks being sold by small companies and an almost over the wall delivery mechanism. The industry quickly realized the problems with this supply chain and the IP business went through very rapid change. At the same time, the average size of the IP blocks has increased and today, what we th... » read more

Established Nodes Getting New Attention
By Ed Sperling - 07 Aug, 2014 - Comments: 0

As the price of shrinking features increases below 28nm, there has been a corresponding push to create new designs at established nodes using everything from near-threshold computing to back biasing and mostly accurate analog sensors. The goals of power, performance and cost haven’t changed, but there is a growing realization among many chipmakers that the formula can be improved upon with... » read more

Test Becomes Power-Aware
By Ann Mutschler - 07 Aug, 2014 - Comments: 0

Power-aware test plans are changing, becoming far more extensive than the minimalist plans that were common just a few years ago. In the past would determine if they could power their design up, power it down, then they’d declare it done. “Sometimes they would find they could power it up and power it down once, but they couldn’t power it up a second time because they’d forgotten to ... » read more

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