A new technical paper titled “Extending and Accelerating Inner Product Masking with Fault Detection via Instruction Set Extension” was published by researchers at KU Leuven, National University of Singapore, and Rambus.
Abstract
“Inner product masking is a well-studied masking countermeasure against side-channel attacks. IPM-FD further extends the IPM scheme with fault detection capabilities. However, implementing IPM-FD in software especially on embedded devices results in high computational overhead. Therefore, in this work we perform a detailed analysis of all building blocks for IPMFD scheme and propose a Masked Processing Unit to accelerate all operations, for example multiplication and IPM-FD specific Homogenization. We can then offload these computational extensive operations with dedicated hardware support. With only 4.05% and 4.01% increase in Look-Up Tables and Flip-Flops (Random Number Generator excluded), respectively, compared with baseline cv32e40p RISC-V core, we can achieve up to 16.55× speed-up factor with optimal configuration. We then practically evaluate the side-channel security via uni- and bivariate Test Vector Leakage Assessment which exhibits no leakage. Finally, we use two different methods to simulate the injected fault and confirm the fault detection capability of up to k − 1 faults, with k being the replication factor.”
Find the technical paper here. December 2025.
Cui, Songqiao, Geng Luo, Junhan Bao, Josep Balasch, and Ingrid Verbauwhede. “Extending and Accelerating Inner Product Masking with Fault Detection via Instruction Set Extension.” Cryptology ePrint Archive (2025).
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