Edge-Inference Architectures Proliferate


First part of two parts. The second part will dive into basic architectural characteristics. The last year has seen a vast array of announcements of new machine-learning (ML) architectures for edge inference. Unburdened by the need to support training, but tasked with low latency, the devices exhibit extremely varied approaches to ML inference. “Architecture is changing both in the comp... » read more

10 Things You Ought To Know Before You Benchmark Your Software Security Program


Benchmarking can help you get a new software security initiative off the ground or better navigate an existing one. It is different from other measurement techniques because it focuses on excellence, includes detailed comparisons, and pools confidential information among numerous organizations. To get you started in the right direction, we’ve put together some quick tips so you get the mos... » read more

Blog Review: Feb. 3


Cadence's Paul McLellan listens in on the outlook from SEMI's recent Industry Strategy Symposium, which looked at the prospects for global recovery, the application areas where growth is expected, and how segments have recently performed. Siemens EDA's Harry Foster takes a look at trends in the adoption of languages and libraries for IC and ASIC designs and finds continued interest in System... » read more

Automotive Functional Safety Compliance In EDA Tools And IP


By Swami Venkat and Meirav Nitzan A modern vehicle can boast as many as 100 million lines of code—that’s more than the Large Hadron Collider (50 million lines) and Facebook (62 million lines). On the hardware side, many of today’s cars have upwards of 100 electronic control units (ECUs) to run various functions. As automotive engineering ingenuity continues to drive further innovation ... » read more

Designing Low Energy Chips And Systems


Energy optimization is beginning to shift left as design teams begin examining new ways to boost the performance of devices without impacting battery life or ratcheting up electricity costs. Unlike power optimization, where a skilled engineering team may reduce power by 1% to 5%, energy efficiency may be able to cut effective power in half. But those gains require a significant rethinking of... » read more

Week In Review: Design, Low Power


The CXL Consortium published the Compute Express Link 2.0 specification. CXL is an interconnect that maintains memory coherency between the CPU memory space and memory on attached devices. CXL 2.0 adds support for switching for fan-out to connect to more devices, memory pooling for increased memory utilization efficiency and providing memory capacity on demand, and support for persistent memory... » read more

AI And ML Applications Require Advanced Datapath Verification


In popular usage, the term “artificial intelligence” (AI) once conjured up images of robot armies subjugating humans or evil computers outsmarting their users, as in '2001: A Space Odyssey.' In recent years, AI has become a part of daily life for much of the planet’s population. People use voice commands to interact with their smartphones, smart speakers and even TV remote controls. Sophi... » read more

Roaring ’20s For The Chip Industry


2020 was a good year for the semiconductor industry and the EDA industry that fuels it, but 2021 has the opportunity to be even better. New end application markets continue to open, and what were once seen as technical hurdles are leading to a multitude of innovative solutions, all of which need suitable tooling. No company can afford to invest everywhere, and so for EDA companies, their rel... » read more

Big Changes In Verification


Verification is undergoing fundamental change as chips become increasingly complex, heterogeneous, and integrated into larger systems. Tools, methodologies, and the mindset of verification engineers themselves are all shifting to adapt to these new designs, although with so many moving pieces this isn't always so easy to comprehend. Ferreting out bugs in a design now requires a multi-faceted... » read more

Blog Review: Jan. 27


Synopsys' Godwin Maben finds that applications like high-performance computing and AI are bringing new dynamics to the power equation, and the key power considerations for chip design that will likely emerge over the course of the year. Siemens EDA's Harry Foster checks out trends in verification technology adoption for IC and ASIC design, with increasing numbers of designs using both dynami... » read more

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