tag: Cadence

Speeding Up AI With Vector Instructions
By Ann Mutschler - 04 Nov, 2020 - Comments: 0

A search is underway across the industry to find the best way to speed up machine learning applications, and optimizing hardware for vector instructions is gaining traction as a key element in that effort. Vector instructions are a class of instructions that enable parallel processing of data sets. An entire array of integers or floating point numbers is processed in a single operation, elim... » read more

Week In Review: Design, Low Power
By Jesse Allen - 30 Oct, 2020 - Comments: 0

M&A AMD will acquire Xilinx for $35 billion in an all-stock deal. "Joining together with AMD will help accelerate growth in our data center business and enable us to pursue a broader customer base across more markets,” said Victor Peng, Xilinx president and CEO. The deal is expected to close by the end of 2021. The acquisition of the programmable logic giant will leave only a few purepla... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 30 Oct, 2020 - Comments: 0

Automotive Synopsys added support for Infineon's automotive AI chip, the AURIX TC4xx 32-bit microcontroller with parallel processing unit. Dialog Semiconductor announced automotive qualification for its DA7280 high-definition haptic driver. The company Alps Alpine is using the DA7280 in Alps Alpine Heavy, the latest version of its HAPTIC Reactor Linear Resonant Actuators (LRAs). Bosch, M... » read more

A Renaissance For Semiconductors
By Brian Bailey - 29 Oct, 2020 - Comments: 2

Major shifts in semiconductors and end markets are driving what some are calling a renaissance in technology, but navigating this new, multi-faceted set of requirements may cause some structural changes for the chip industry as it becomes more difficult for a single company to do everything. For the past decade, the mobile phone industry has been the dominant driver for the semiconductor eco... » read more

Different Requirements For Hyperscale Computing Across Vertical Application Domains
By Frank Schirrmeister - 29 Oct, 2020 - Comments: 0

As mentioned in previous posts, one of the key conversations I have with customers a lot these days is how to deal with the balance of storage, compute and connectivity as we enter the era of hyperscale computing. While there are overarching challenges that are “of similar class” across the vertical application domains—consumer, hyperscale computing, mobile, networking, aerospace/defense,... » read more

Using Verification Data More Effectively
By Ann Mutschler - 29 Oct, 2020 - Comments: 0

Verification is producing so much data from complex designs that engineering teams need to decide what to keep, how long to keep it, and what they can learn from that data for future projects. Files range from hundreds of megabytes to hundreds of gigabytes, depending on the type of verification task, but the real value may not be obvious unless AI/machine learning algorithms are applied to a... » read more

Blog Review: Oct. 28
By Jesse Allen - 28 Oct, 2020 - Comments: 0

Synopsys' Jacob Wilson provides some tips for how to prepare for the upcoming ISO SAE 21434 cybersecurity standard for road vehicles, starting with a security plan and understanding of risk levels. Cadence's Paul McLellan checks out Arm's first face-to-face wafer-bonded design, why it might be desirable, and some important aspects of how the proof-of-concept was developed. In a video, Men... » read more

Rigid-Flex PCB Bending EM Analysis Using Clarity 3D Solver
By Cadence - 28 Oct, 2020 - Comments: 0

Rigid-Flex PCBs have been used in many modern electronic devices (such as mobile phones, laptops, and wearables, among others), due to their form factor, light weight, and cost-effectiveness. Electromagnetic (EM) analysis of Rigid-Flex PCBs has always been a challenging task for many commercially available 3D numerical solver technologies (FEM and FDTD), due to the complexity in the 3D designs.... » read more

Performance and Power Tradeoffs At 7/5nm
By Ed Sperling - 27 Oct, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss power optimization with Oliver King, CTO at Moortec; João Geada, chief technologist at Ansys; Dino Toffolon, senior vice president of engineering at Synopsys; Bryan Bowyer, director of engineering at Mentor, a Siemens Business; Kiran Burli, senior director of marketing for Arm's Physical Design Group; Kam Kittrell, senior product management group d... » read more

Week In Review: Design, Low Power
By Jesse Allen - 23 Oct, 2020 - Comments: 0

M&A Microchip Technology acquired LegUp Computing, a provider of a high-level synthesis compiler that automatically generates high-performance FPGA hardware from software. The LegUp HLS tool will be used alongside Microchip’s VectorBlox Accelerator Software Design kit and VectorBlox Neural Networking IP generator to provide a complete front-end solution stack for C/C++ algorithm develope... » read more

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