tag: Cadence

Week In Review: Design, Low Power
By Jesse Allen - 09 Oct, 2020 - Comments: 0

Arm spun out Cerfe Labs to develop and license new types of non-volatile memories based on correlated electron materials (CeRAM) and ferroelectric transistors (FeFETs). Arm CeRAM researchers will join Cerfe Labs and assume ownership of the Arm joint development project with Symetrix Corporation. Read more about the new company and its technology in Cerfe Labs: Spin-On Memory. Tools & IP ... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 09 Oct, 2020 - Comments: 0

Security A new certification program for hardware verification engineers from Edaptive Computing Inc (ECI) and OneSpin Solutions promises to help companies meet IC integrity standards for SoC designs for 5G, IoT, AI, automotive, industrial, defense, and avionics. These designs are often complex, with a variety of elements, such as programmable logic and different cores. The OneSpin Formal Veri... » read more

Sensor Fusion Challenges In Cars
By Ann Mutschler - 08 Oct, 2020 - Comments: 0

The automotive industry is zeroing in on sensor fusion as the best option for dealing with the complexity and reliability needed for increasingly autonomous vehicles, setting the stage for yet another shift in how data from multiple devices is managed and utilized inside a vehicle. The move toward greater autonomy has proved significantly more complicated than anyone expected at first. There... » read more

One SerDes Solution Doesn’t Fit All
By Paul McLellan - 08 Oct, 2020 - Comments: 0

Way back in the 1960s, E. Rent, who was working at IBM at the time, noticed a connection between the number of pins P on integrated circuits being used and the number of gates G on the integrated circuits. It was a power law, where the number of pins was cGR where c and R are constants. Actually, traditionally a Greek rho is used instead of R. It usually has a value between 0.5 and 0.8. If R... » read more

3D PCB Design And Analysis: ECAD/MCAD And Where They Converge
By Cadence - 07 Oct, 2020 - Comments: 0

The design of a board and its ‘home’ are heavily interdependent. They require careful consideration to ensure everything will be in working order when your product is ultimately brought to market. Many designs have been derailed by conflicts between ECAD and MCAD. Something as simple as an improperly placed / communicated mounting hole can send your project into a tailspin of re-designs. ... » read more

Blog Review: Oct. 7
By Jesse Allen - 07 Oct, 2020 - Comments: 0

In a blog for Arm, University of Southampton PhD student Sivert Sliper looks at how energy-driven and intermittent computing could be used to power trillions of IoT devices and introduces a SystemC-based simulator for such systems. Mentor's Chris Spear explains why transaction classes should extend from uvm_sequence_item rather than uvm_transaction when designing UVM testbenches. Cadence'... » read more

System-Level Packaging Tradeoffs
By Ann Mutschler - 30 Sep, 2020 - Comments: 0

Leading-edge applications such as artificial intelligence, machine learning, automotive, and 5G, all require high bandwidth, higher performance, lower power and lower latency. They also need to do this for the same or less money. The solution may be disaggregating the SoC onto multiple die in a package, bringing memory closer to processing elements and delivering faster turnaround time. But ... » read more

Blog Review: Sept. 30
By Jesse Allen - 30 Sep, 2020 - Comments: 0

Synopsys' Fred Bals takes a look open source projects that, while popular, go understaffed or underfunded, how that can lead to potential security vulnerabilities, and why users who rely on them should consider stepping up to contribute. In a video, Mentor's Colin Walls explains the basic concepts of multicore systems as it relates to embedded programming. Cadence's Paul McLellan ponders ... » read more

Deals That Change The Chip Industry
By Ed Sperling - 28 Sep, 2020 - Comments: 0

Nvidia's pending $40 billion acquisition of Arm is expected to have a big impact on the chip world, but it will take years before the effects of this deal are fully understood. More such deals are expected over the next couple of years due to several factors — there is a fresh supply of startups with innovative technology, interest rates are low, and market caps and stock prices of buyers ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 25 Sep, 2020 - Comments: 0

Tools & IP Arm added two new platforms to its product roadmap: the Neoverse V1, and the Neoverse N2, the second-generation N-series platform. The V1 platform supports Scalable Vector Extensions (SVE), provides 50% better single-threaded performance over N1, and targets high-performance cloud, HPC, and machine learning applications. The N2 provides 40% higher single-threaded performance com... » read more

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