tag: Cadence

Which Verification Engine When
By Ed Sperling - 31 Oct, 2019 - Comments: 0

Frank Schirrmeister, group director for product marketing at Cadence, talks about which tools get used throughout the design flow, from architecture to simulation, formal verification, emulation, prototyping all the way to production, how the cloud has impacted the direction of the flow, and how machine learning will impact verification. » read more

Migrating 3D Into The Mainstream
By Brian Bailey - 31 Oct, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for ANSYS' Semiconductor Business Unit; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Business;... » read more

Blog Review: Oct. 30
By Jesse Allen - 30 Oct, 2019 - Comments: 0

Cadence's Paul McLellan checks out the future of the automotive industry, the options for making the transition to autonomous driving, and how experience with electric vehicles influences perception of them. In a video, Mentor's Colin Walls digs into the challenges of testing memory in an embedded system. A Synopsys writer looks at doubling bandwidth in PCIe 5.0, the PHY logical changes a... » read more

Rapid Evolution For Verification Plans
By Brian Bailey - 28 Oct, 2019 - Comments: 0

Verification plans are rapidly evolving from mechanisms to track verification progress into multi-faceted coordination vehicles for several teams with disparate goals, using complex resource management spread across multiple abstractions and tools. New system demands from industries such as automotive are forcing tighter integration of those plans with requirements management and product lif... » read more

Week In Review: Design, Low Power
By Jesse Allen - 25 Oct, 2019 - Comments: 0

ANSYS will acquire Dynardo, a provider of simulation process integration and design optimization (PIDO) technology. Dynardo's tools include algorithms for optimization, uncertainty quantification, robustness, scenario variation, sensitivity analysis, simulation workflow building and data mining. Based in Weimar, Germany, Dynardo was founded in 2001 and has been an ANSYS software partner; the ac... » read more

Does System Design Still Need Abstraction?
By Frank Schirrmeister - 24 Oct, 2019 - Comments: 0

About 15 years ago, the assumption in the EDA industry was that system design would be inevitable. The transition from gate-level design to a new entry point at the register transfer level (RTL) seemed complete with logic synthesis becoming well-adopted. The next step seemed to be so obvious at the time: High-level synthesis (HLS) and transaction-based development beyond RTL—also taking into ... » read more

IP Management And Development At 5/3nm
By Ann Mutschler - 24 Oct, 2019 - Comments: 1

The growing complexity of moving to new process nodes is making it much more difficult to create, manage and re-use IP. There are more rules, more data to manage, and more potential interactions as density increases, both in planar implementations and in advanced packaging. And the problems only get worse as designs move to 5nm and 3nm, and as more heterogeneous components such as accelerato... » read more

Compressing Datasets Created During Silicon Design
By Cadence - 23 Oct, 2019 - Comments: 0

Authors: Guru Rao, Distinguished Engineer; Shakir Abbas, Software Engineering Group Director; Mohammad Mirfendereski, Configuration Management Architect; Cadence. Harsh Sharangpani, CEO and CTO; Rajesh Patil, VP-Business Development; Ascava. During the design cycle for modern semiconductor components, a very large amount of data is generated and stored, often accumulating to hundreds of tera... » read more

Blog Review: Oct. 23
By Jesse Allen - 23 Oct, 2019 - Comments: 0

ANSYS' Magdy Abadir digs into the challenges associated with identifying and modeling electromagnetic crosstalk and the architectural and design trends that contribute to it. Cadence's Paul McLellan listens in as automotive security expert Charlie Miller points to how close we are to Level 4 autonomy and where in a car attack surfaces lie. Mentor's Brent Klingforth checks out the process ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 18 Oct, 2019 - Comments: 0

Allegro DVT acquired Amphion Semiconductor, bringing together two developers of video codec IP. Allegro DVT said the merger will make it the first semiconductor IP company to offer commercially available hardware-based, real-time encoder and decoder solutions for the new AV1 video encoding format for SoC implementations, supporting 4K/UHD up to 8K. Based in Belfast, Northern Ireland, Amphion wa... » read more

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