Blurring The Lines On Prototyping


Prototyping is an integral part of every [getkc id="81" kc_name="SoC"] today, with two main approaches being used: virtual or software-based, and physical, which includes FPGA-based boards as well as hardware emulation systems. [getkc id="104" kc_name="Virtual prototyping"] is typically used for software development in the early stages of SoC design, even before SoC [getkc id="49" kc_name="R... » read more

How Health And Auto Requirements Drive IoT Design


One of the fun parts of my job is that I am looking at the requirements of our customer’s customers quite a bit to understand where to focus our efforts on the tool side. As a follow on to my last post “System Design Enabling The Human Intranet,” this month I am looking at the requirements imposed on system design by health and automotive applications as they were discussed at DATE in Gre... » read more

Meeting Functional Safety Requirements Efficiently Via Electronic Design Tools And Techniques


In an intelligent electronic system, unexpected errors can lead to unplanned, unexpected behavior. This can be a potentially dangerous proposition for, say, an automotive manufacturer, as well as a costly occurrence for consumer product developers. Compliance to the latest safety standards can be a laborious, time-consuming process. Fortunately, there are now technologies available that can aut... » read more

Blog Review: April 22


DARPA thinks machine-brain interfaces are poised to become an industry-changing technology. Rambus' David G. Stork brings us emerging developments in the field from the Neural Engineering Boot Camp. If you live in an area that doesn't get quite enough sun for solar panels, how about a smart window that harvests energy from wind and rain? In this week's top five picks, Ansys' Justin Nescott a... » read more

Week 45: 7 Weeks To DAC


Make sure to download and use the mobile app for #52DAC this year. It will make your time at the conference a lot easier and should even bring you a bit of fun — and a chance to win a new Apple watch. This year the app includes a game called DAC Attack. No, you don’t score by throwing virtual tomatoes at the executive committee, though we can help you rack up points. (More on this in a b... » read more

The Week In Review: Design/IoT


Mergers & Acquisitions ARM made two acquisitions related to Bluetooth radio: Wicentric, a Bluetooth Smart stack and profile provider, and Sunrise Micro Devices (SMD), a provider of sub-one volt Bluetooth radio IP. The IP of both companies will be integrated to form ARM's new low-power radio IP portfolio. Numbers EDA revenue grew 11.9% in Q4 2014 to $2.1 billion, a new record for th... » read more

FD-SOI Vs. FinFETs


Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

Blog Review: April 15


How much memory do you need to look 13 billion years in the past? Rambus' Aharon Etengoff ponders the Square Kilometre Array's massive number of radio telescopes and what it means for computing. NXP's Martin Schoessler argues that for smart cities to work for their citizens, both technology companies and government entities will need a new mind-set. Reinventing the wheel is a good thing i... » read more

ChaoLogix: Integrated Security


Semiconductor Engineering sat down with ChaoLogix’s chairman and CEO, Brian Kelly, and Chowdary Yanamadala, senior vice president of business development, to talk about the company's approach to securing semiconductors from side-channel attacks. SE: Given that the term “data security” has almost as many definition as there are braches, let start with a basic question: What does data s... » read more

The Week In Review: Design/IoT


Certifications TSMC certified a number of tools for its current 10nm FinFET design rules and SPICE models and 16nm FinFET Plus (16FF+) V1.0 process, including: Ansys' power integrity and electromigration tools; Cadence's custom/analog and digital implementation and signoff tools; Mentor Graphics' physical verification, design for manufacturing, and circuit verification tools; and Synopsys' ful... » read more

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