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Technical Paper Roundup: Oct. 4


New technical papers added to Semiconductor Engineering’s library this week. [table id=55 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Visual Fault Inspection Using A Hybrid System Of Stacked DNNs


A technical paper titled "Improving automated visual fault inspection for semiconductor manufacturing using a hybrid multistage system of deep neural networks" was published by researchers at Chemnitz University of Technology (Germany). According to the paper, "this contribution introduces a novel hybrid multistage system of stacked deep neural networks (SH-DNN) which allows the localization... » read more

Energy Harvesting Starting To Gain Traction


Tens of billions of IoT devices are powered by batteries today. Depending on the compute intensity and the battery chemistry, these devices can run steadily for short periods of time, or they can run occasionally for decades. But in some cases, they also can either harvest energy themselves, or tap into externally harvested energy, allowing them to work almost indefinitely. Energy harvesting... » read more

Week In Review: Design, Low Power


Tools Cadence teamed up with Tower Semiconductor to release a silicon-validated SP4T RF SOI switch reference design flow using the Cadence Virtuoso Design Platform and RF Solution. The reference design flow targets advanced 5G wireless, wireline infrastructure, and automotive IC product development and include a set of mixed-signal and RF design, simulation, system analysis and signoff tools t... » read more