Chip Industry Technical Paper Roundup: Dec 30


New technical papers recently added to Semiconductor Engineering’s library: [table id=509 /] Find more semiconductor research papers here. » read more

Physical Modeling and Benchmarking for 2T-SOT-MRAM (Georgia Tech, MIT, Cornell)


A new technical paper titled "Modeling and Optimization of Two-Terminal Spin-Orbit-Torque MRAM" was published by researchers at Georgia Institute of Technology, MIT, and Cornell University. Abstract "This paper presents physical modeling and benchmarking for two-terminal spin-orbit torque magnetic random-access memory (2T-SOT-MRAM). The results indicate that the common SOT materials that ... » read more

Chip Industry Week in Review


Major Deals: Taiwan-based UMC is exploring possible collaboration with Polar Semiconductor for high-volume production of 8-inch wafers at Polar’s expanded Minnesota fab, a move that could provide domestic manufacturing capacity for automotive, data center, consumer, aerospace, and defense customers. Marvell will acquire Celestial AI for $3.25B, adding photonic fabric technology for o... » read more

Research Bits: Dec. 2


Ionothermoelectric cooling Researchers from the University of Osaka, University of Tokyo, and Japan's National Institute of Advanced Industrial Science and Technology proposed an ionothermoelectric cooling strategy for chips that enhances cooling by driving the flow of ions through nanoscale channels. “We fabricated a nanosized pore in a semiconductor membrane and surrounded the nanopore ... » read more

Chip Industry Week In Review


China's Hefei Lumiverse Technology reportedly has developed a desktop-sized High Harmonic Generation light source that generates wavelengths as small as 1nm. One customer already has used it to produce 14nm chips, which was the original target node for EUV, according to one report. As a point of comparison, TSMC and Samsung didn't start using EUV until the 7nm node, relying instead on immersion... » read more

Chip Industry Technical Paper Roundup: Nov. 18


New technical papers recently added to Semiconductor Engineering’s library: [table id=492 /] Find more semiconductor research papers here. » read more

New Interconnect Materials Beyond Copper (Florida State Univ., Cornell)


A new technical paper titled "Shrinking interconnects beyond copper" was published by researchers at Florida State University and Cornell University. Excerpt "The continuous downscaling of transistors in integrated circuits following Moore’s law—doubling the number of transistors on a microchip about every 2 years—has been an extraordinary feat of engineering, pushing the limits of fu... » read more

Chip Industry Week in Review


Samsung reportedly is hiking memory chip prices by 30% to 60% due to high demand from AI data centers and constrained supplies. Those shortages are causing ripples elsewhere. SMIC, China's largest foundry, said its customers are holding back orders for other types of semiconductor due to concerns about memory supplies. Meanwhile, interest in photonics and power semiconductors is picking up, ... » read more

3D Imaging Buried Interfaces In Twisted Oxide Moirés (Cornell, SLAC, Stanford et al.)


A new technical paper titled "Mind the Gap -- Imaging Buried Interfaces in Twisted Oxide Moirés" was published by researchers at Cornell University, SLAC National Accelerator Laboratory, Stanford University, USC, North Carolina State University, University of Chicago, Institute for Basic Science and POSTECH. Abstract "The ability to tune electronic structure in twisted stacks of layered, t... » read more

Chip Industry Technical Paper Roundup: Nov. 10


New technical papers recently added to Semiconductor Engineering’s library: [table id=490 /] Find more semiconductor research papers here. » read more

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