tag: finFET

ST-Ericsson 28nm FD-SOI/ARM Chip Hits 2.8GHz at CES
By Various Writers - 22 Jan, 2013 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ What a great start to 2013: at CES in Las Vegas, ST-Ericsson announced the NovaThor™ L8580 ModAp, “the world’s fastest and lowest-power integrated LTE smartphone platform.” This is the one that’s on STMicroelectronics’ 28nm FD-SOI, with sampling set for Q1 2013. And it’s a game changer – for users, fo... » read more

Mix-And-Match Power Options
By Ed Sperling - 06 Dec, 2012 - Comments: 0

By Ann Steffora Mutschler Choices abound today when it comes to considering a node shrink. Fully depleted silicon on insulator (FD-SOI) and finFET technologies along with other advanced transistor options are being evaluated, both together and independently of the other. It is possible to implement finFET on bulk 28nm CMOS or finFET on an FD-SOI process, for example. It is also possible to imp... » read more

Chip Architect Challenges
By Ed Sperling - 06 Dec, 2012 - Comments: 0

By Ann Steffora Mutschler Product lifecycles can be shorter than the design cycle and even the process development cycle, particularly in the consumer handheld device market. It’s up to the chip architect to decide how the functions should be implemented. The good news is there are a number of options available, ranging from mapping the design to 2.5D technology, moving to finFET tr... » read more

Experts At The Table: Obstacles In Low-Power Design
By Ed Sperling - 06 Dec, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss low-power design with with Leah Clark, associate technical director at Broadcom; Richard Trihy, director of design enablement at GlobalFoundries; Venki Venkatesh, engineering director at Atrenta; and Qi Wang, technical marketing group director at Cadence. What follows are excerpts of that conversation. LPHP: If you ar... » read more

Experts At The Table: Obstacles In Low-Power Design
By Ed Sperling - 06 Dec, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss low-power design with with Leah Clark, associate technical director at Broadcom; Richard Trihy, director of design enablement at GlobalFoundries; Venki Venkatesh, engineering director at Atrenta; and Qi Wang, technical marketing group director at Cadence. What follows are excerpts of that conversation. LPHP: If you ar... » read more

Don’t miss Fully-Depleted Tech Symposium during IEDM (SF)
By Various Writers - 04 Dec, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ If you want to cut through the noise surrounding the choices for 28nm and beyond, an excellent place to start is the SOI Consortium’s Fully Depleted Technology Symposium. As a member of the design and manufacturing communities, this is your chance to see and hear what industry leaders are actually doing. Planar? F... » read more

Wafer Leaders Extend Basis for Global SOI Supply
By Various Writers - 16 Oct, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ It’s a bright green light from the world leaders in SOI wafer capacity. Soitec, the world leader in SOI wafer production, and long-time partner Shin-Etsu Handatai (SEH), the world’s biggest producer of silicon wafers, have extended their licensing agreement and expanded their technology cooperation. SEH is a $12... » read more

SPOTLIGHT ON FD-SOI, FINFETS AT IEEE SOI CONFERENCE
;1-4 OCT, NAPA
By Various Writers - 25 Sep, 2012 - Comments: 0

The 38th annual SOI Conference is coming right up. Sponsored by IEEE Electron Devices Society, this is the only dedicated SOI conference covering the full technology chain from materials to devices, circuits and system applications. Chaired this year by Gosia Jurczak (manager of the Memories Program at imec), this excellent conference is well worth attending. It’s where the giants of the ... » read more

Power And Performance: GSS Sees SOI Advantages For FinFETs
By Various Writers - 17 Sep, 2012 - Comments: 0

Are FinFETs better on SOI? In a series of papers, high-profile blogs and subsequent media coverage,Gold Standard Simulations (aka GSS) has indicated that, yes, FinFETs should indeed be better on SOI. To those of us not deeply involved in the research world, much of this may seem to come out of nowhere.  But there’s a lot of history here, and in this blog we’ll take a look at what it’s... » read more

Firms Rethink Fabless-Foundry Model
By Ed Sperling - 31 Jul, 2012 - Comments: 0

By Mark LaPedus As chipmakers move toward 20nm designs, finFETs and 3D stacked devices, the industry is beginning to re-think the fabless-foundry model. Leading-edge foundries are finally getting serious about the “virtual IDM” model, in which vendors will act more like integrated device manufacturers (IDMs), as opposed to being mere production partners. In this model, the found... » read more

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