Blog Review: April 6


Synopsys' Ron Lowman considers the increase in specialized AI IP in SoCs, including the different aspects within AI classifications, markets that are driving its growth, key SoC design challenges, and nurturing SoC designs beyond integration. Siemens' Joe Hupcey III finds that the only way to be completely sure that RISC-V RTL is free of any natural or malicious surprises is to apply exhaust... » read more

Week In Review: Manufacturing, Test


Worldwide fab equipment spending for front-end manufacturing is expected to hit $107 billion this year, an 18% year-over-year increase, according to SEMI’s latest World Fab Forecast report. “Crossing the $100 billion mark in spending on global fab equipment for the first time is a historic milestone for the semiconductor industry,” said Ajit Manocha, president and CEO of SEMI. Investme... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Suzuki will collaborate with SkyDrive on flying cars. SkyDrive is working on an air taxi service that it wants to launch at the 2025 World Exposition in Osaka, Japan. Recalls: The car company Tesla is recalling 947 vehicles in the United States because rearview image lags and does not display immediately when the car is put into reverse, said the National Highway Traffic Safety A... » read more

Highly Selective Etch Rolls Out For Next-Gen Chips


Several etch vendors are starting to ship next-generation selective etch tools, paving the way for new memory and logic devices. Applied Materials was the first vendor to ship a next-gen selective etch system, sometimes called highly-selective etch, in 2016. Now, Lam Research, TEL, and others are shipping tools with highly-selective etch capabilities, in preparation for futuristic devices su... » read more

Week In Review: Manufacturing, Test


Chipmakers, OEMs Intel continues to build more fabs. First, the company announced fabs in Arizona and then Ohio. Now, Intel plans to invest up to €80 billion in the European Union over the next decade. As part of the effort, Intel plans to build two semiconductor fabs in Magdeburg, Germany. Construction is expected to begin in the first half of 2023 and production planned to come online in 2... » read more

Extending Copper Interconnects To 2nm


Transistor scaling is reaching a tipping point at 3nm, where nanosheet FETs will likely replace finFETs to meet performance, power, area, and cost (PPAC) goals. A significant architectural change is similarly being evaluated for copper interconnects at 2nm, a move that would reconfigure the way power is delivered to transistors. This approach relies on so-called buried power rails (BPRs) and... » read more

Accelerating Semiconductor Process Development Using Virtual Design Of Experiments


Design of Experiments (DOE) are a powerful concept in semiconductor engineering research and development. DOEs are sets of experiments used to explore the sensitivity of experimental variables and their effect on final device performance. A well-designed DOE can help an engineer achieve a targeted semiconductor device performance using a limited number of experimental wafer runs. However, in se... » read more

Precision Selective Etch And The Path To 3D


Scaling (the shrinking of the tiny devices in chips such as transistors and memory cells) has never been easy, but making the next generation of advanced logic and memory devices a reality requires creating new structures at the atomic scale. When working with dimensions this small, there is little room for variation. Compounding the problem is a need to remove material isotropically, or, un... » read more

Next-Gen Transistors


Nanosheets, or more generally, gate-all-around FETs, mark the next big shift in transistor structures at the most advanced nodes. David Fried, vice president of computational products at Lam Research, talks with Semiconductor Engineering about the advantages of using these new transistor types, along with myriad challenges at future nodes, particularly in the area of metrology. » read more

Blog Review: March 2


Arm's Charlotte Christopherson checks out SpiNNaker1, a project to develop a massively parallel, manycore supercomputer architecture that mimicked the interactions of biological neurons, and its follow up, SpiNNaker2, a hybrid system that combines statistical AI and neuromorphic computing. Cadence's Paul McLellan looks at open and generic PDKs that can be used by researchers and in education... » read more

← Older posts Newer posts →