tag: Lam Research

Atomic Layer Etch Heats Up
By Mark LaPedus - 29 Jun, 2016 - Comments: 0

The atomic layer etch (ALE) market is starting to heat up as chipmakers push to 10nm and beyond. ALE is a promising next-generation etch technology that has been in R&D for the last several years, but until now there has been little or no need to use it. Unlike conventional etch tools, which remove materials on a continuous basis, ALE promises to selectively and precisely remove targete... » read more

Blog Review: June 29
By Jesse Allen - 29 Jun, 2016 - Comments: 0

Ansys' Justin Nescott checks out the world's first electric highway for trucking in this week's top five tech picks. Plus, some cool houses, Boston Dynamics' giraffe-bot, and a drum kit in a backpack. Applied's Matt Cogorno takes a look at the challenges facing etch methods as devices keep getting smaller. Synopsys' Apoorva Mathur digs into the energy efficient aspects of the MIPI M-PHY a... » read more

Interconnect Challenges Rising
By Mark LaPedus - 27 Jun, 2016 - Comments: 1

Chipmakers are ramping up their 14nm finFET processes, with 10nm and 7nm slated to ship possibly later this year or next. At 10nm and beyond, IC vendors are determined to scale the two main parts of the [getkc id="185" kc_name="finFET"] structure—the transistor and interconnects. Generally, transistor scaling will remain challenging at advanced nodes. And on top of that, the interconnects ... » read more

IMEC Partner Technical Week Review
By Aurélie Juncker - 23 Jun, 2016 - Comments: 0

In March 2016, Coventor was invited to the biannual Partner Technical Week (PTW) at IMEC in Leuven, Belgium. IMEC, a world-leading research group in nanotechnology, organizes their Partner Technical Week every six months to present scientific results to their partners. During this week, a number of specialists from IMEC's many partner companies also discuss their progress in areas related to IM... » read more

Next Challenge: Contact Resistance
By Mark LaPedus - 23 Jun, 2016 - Comments: 0

In chip scaling, there is no shortage of challenges. Scaling the finFET transistor and the interconnects are the biggest challenges for current and future devices. But now, there is another part of the device that’s becoming an issue—the contact. Typically, the contact doesn’t get that much attention, but the industry is beginning to worry about the resistance in the contacts, or conta... » read more

Back-End-of-Line (BEOL) Metallization
By Coventor - 22 Jun, 2016 - Comments: 0

Physical Vapor Deposition (PVD) for Back-End-of-Line (BEOL) metallization is being pushed to the limits at the 16-nanometer (nm) technology node and beyond. Extending PVD for metal liner and barrier seed deposition is forcing the process into a narrow window that must be characterized prior to manufacturing introduction. Furthermore, understanding the liner dependency on the trench and via etch... » read more

Blog Review: June 22
By Jesse Allen - 22 Jun, 2016 - Comments: 0

A Lam Research writer investigates the challenges that lie ahead for interconnects and whether current technologies will find new life or be replaced by new strategies. There's a greater force powering Moore's Law, says Cadence's Paul McLellan, who points to the vast amount of transistors being used for memory. Mentor's Robert Bates considers the challenges of securing in-hospital network... » read more

ASML To Buy Hermes
By Mark LaPedus - 16 Jun, 2016 - Comments: 0

Looking to expand into new markets, ASML Holding has entered into an agreement to acquire e-beam wafer inspection specialist Hermes Microvision (HMI) in a cash transaction valued at 2.75 billion euros (US$3.08 billion). With the proposed acquisition of Taiwan’s HMI, ASML will enter two new markets—-wafer inspection as well as mask inspection for extreme ultraviolet (EUV) lithography. In ... » read more

Plotting The Next Semiconductor Road Map
By Ed Sperling - 13 Jun, 2016 - Comments: 0

The semiconductor industry is retrenching around new technologies and markets as Moore's Law becomes harder to sustain and growth rates in smart phones continue to flatten. In the past, it was a sure bet that pushing to the next process node would provide improvements in power, performance and cost. But after 22nm, the economics change due to the need for multi-patterning and finFETs, and th... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 10 Jun, 2016 - Comments: 0

MEMS manufacturing A*STAR’s Institute of Microelectronics (IME) in Singapore has launched its third consortium to develop MEMS technologies. This would allow MEMS sensor devices to achieve better performance, higher power efficiency and a smaller form factor. The MEMS Consortium III consists of the following companies: Applied Materials, Coventor, Delta Electronics, GlobalFoundries, InvenS... » read more

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