Security Threats Converge On IoT, Industrial ICs, Physical AI


Devices in a broad range of edge AI applications are increasingly at risk of hacking or tampering, with the stakes varying greatly depending on how much the device can impact and interact with human life. Design methods and protection techniques must now be included up front in the design cycle for optimal protection of consumers and companies as the quantum threat looms. In today’s factor... » read more

Chip Industry’s Top Videos 2025


Rising complexity, new architectures, and AI's permeation of nearly everything left engineers struggling to keep up in 2025, as evidenced by this year's viewership numbers. Among the hottest topics were verification, agentic AI, DRAM/HBM, optimization of data movement, chiplets, and heterogeneous integration, but there was steady traffic growth across all sectors. Top 10 most-watched videos ... » read more

2025 – A Year Of Change And Anticipation


2025 has certainly been a year of unexpected changes. These had a significant impact on the semiconductor industry and everything that supports it. Not all the changes have been bad, but flexibility has been a requirement for continued success or to make the most of an opportunity provided. Some industries, such as aerospace and defense, are seeing a significant boost around the world. Data ... » read more

Programmable Chips Evolve For Shifting Needs


ICs and SoCs are utilizing a range of processing elements that allow them to optimize current workloads while hedging their bets for the future. What used to be a simple choice between an ASIC, FPGA, or DSP, has evolved into a mix of processor types and architectures, including varying levels of programmability and customization. Speed is essential, but technology is evolving so quickly that... » read more

AI Workloads at the Edge: Ensuring Performance, Privacy, and Security


Experts At The Table: Semiconductor Engineering gathered a group of experts to discuss why some AI workloads are better suited for on-device processing to achieve consistent performance, avoid network connectivity issues, reduce cloud computing costs, and ensure privacy. The panel included Frank Ferro, group director in the Silicon Solutions Group at Cadence; Eduardo Montanez, vice president a... » read more

Chip Industry Technical Paper Roundup: Dec. 16


New technical papers recently added to Semiconductor Engineering’s library: [table id=501 /] Find more semiconductor research papers here and in the most recent Chip Industry Week in Review. » read more

MIPI CSI-2 Provides The Backbone Of Automotive Sensor Networks


As the automotive sector accelerates toward higher levels of autonomy, the complexity and scale of sensor networks within vehicles are rapidly expanding. For semiconductor engineers, the challenge is not only to deliver high-performance silicon but also to ensure robust, scalable, and secure data transport across heterogeneous sensor arrays. The MIPI CSI-2 protocol has emerged as the de facto s... » read more

Limited by Power


AI is seen as a massive computation problem, but that is not the case, at least with the way that the problem is structured today. It is a data movement problem. This not only limits performance but represents most of the energy consumption. In addition, the industry spends most of its time and effort making small improvements that optimize aspects of the existing architecture, when what is ... » read more

Chiplets Vs. Soft IP: Different In Almost Every Way


Chiplets serve a similar function as the soft IP widely used in chips today, but the similarities end there. While both can speed time to market and enable design teams to focus limited resources where they can best be applied, the implementation, manufacturing, test, and long-term business requirements wrought by a chiplet marketplace would be very different. Soft IP (also known as RTL IP) ... » read more

HW Security: Inner Product Masking With Fault Detection Via ISE (KU Leuven, NUS, Rambus)


A new technical paper titled "Extending and Accelerating Inner Product Masking with Fault Detection via Instruction Set Extension" was published by researchers at KU Leuven, National University of Singapore, and Rambus. Abstract  "Inner product masking is a well-studied masking countermeasure against side-channel attacks. IPM-FD further extends the IPM scheme with fault detection capabil... » read more

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