Complete Formal Verification of RISC V Processor IPs for Trojan-Free Trusted ICs


RISC-V processor IPs are increasingly being integrated into system-on-chip designs for a variety of applications. However, there is still a lack of dedicated functional verification solutions supporting high-integrity, trusted integrated circuits. This paper examines an efficient, novel, formal-based RISC-V processor verification methodology. The RISC-V ISA is formalized in a set of Operational... » read more

Who’s Responsible For Security Breaches?


Semiconductor Engineering sat down to discuss industry attitudes towards safety and security with Dave Kelf, chief marketing officer for Breker Verification; Jacob Wiltgen, solutions architect for functional safety at Mentor, a Siemens Business; David Landoll, solutions architect for OneSpin Solutions; Dennis Ciplickas, vice president of characterization solutions at PDF Solutions; Andrew Dauma... » read more

Copy-Row DRAM (CROW) : Substrate for Improving DRAM


Source/Credit: ETH Zurich & Carnegie Mellon University Click here for the technical paper and here for the power point slides » read more

Power, Reliability And Security In Packaging


Semiconductor Engineering sat down to discuss advanced packaging with Ajay Lalwani, vice president of global manufacturing operations at eSilicon; Vic Kulkarni, vice president and chief strategist in the office of the CTO at ANSYS; Calvin Cheung, vice president of engineering at ASE; Walter Ng, vice president of business management at UMC; and Tien Shiah, senior manager for memory at Samsun... » read more

Hacking SoC IP Under Pressure


Hack@DAC certainly shows that some teams can find bugs faster than others. The hackfest, now in its third year, is a bug-finding contest for teams of university students joined by a smattering of industry members whose task is to find a bugs implanted in SoC IP.  The teams follow the practices of real-world security teams. “[The teams'] objective is to identify the security vulnerabilitie... » read more

Disregard Safety And Security At Your Own Peril


Semiconductor Engineering sat down to discuss industry attitudes towards safety and security with Dave Kelf, chief marketing officer for Breker Verification; Jacob Wiltgen, solutions architect for functional safety at Mentor, a Siemens Business; David Landoll, solutions architect for OneSpin Solutions; Dennis Ciplickas, vice president of characterization solutions at PDF Solutions; Andrew Dauma... » read more

Algorithms And Security


From a security standpoint, the best thing AI has going for it is that it's in a state of perpetual change. That also may be the worst thing. The problem, at least for now, is that no one knows for sure. What’s clear is that security is not a primary concern when it comes to designing and building AI systems. In many cases it’s not even an action item because architectures are constantly... » read more

Holes In AI Security


Mike Borza, principal security technologist in Synopsys’ Solutions Group, explains why security is lacking in AI, why AI is especially susceptible to Trojans, and why small changes in training data can have big impacts on many devices. » read more

Securing The Mobile IoT


It’s 2019. Security fears, locked ecosystems, and lack of technology are keeping IoT products within WiFi networks, and not reaching their full potential. As an industry, we must provide IoT solutions that are simple and keep consumers--and their data--secure.The mobile IoT is the next frontier in the connected device market, providing out-of-the-box connectivity with security from silicon... » read more

Blog Review: June 5


Mentor's Neil Johnson argues that coverage closure shouldn't have to be mad scramble in the home stretch of development if designers change their early development mindset. In a video, Cadence's Amol Borkar explains Simultaneous Localization and Mapping, or SLAM, from the creation of a map of an unknown environment and understanding the orientation of a camera in this space. Synopsys' Tay... » read more

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