tag: STMicroelectronics

IoT Requires The Evolution Of The “New” 200mm Fab
By SEMI - 01 Jun, 2015 - Comments: 0

By Bill Martin & Paul Werbaneth In April, we all celebrated the 50th anniversary of Moore’s Law. While critical for the industry, sometimes “chasing-the-latest-technology” business model is not the answer. Sometimes veering away from Moore’s Law makes more sense and is a better alternative. But, ever since the 1970’s, many product developer minds were conditioned that smaller w... » read more

The Week In Review: Design/IoT
By Jesse Allen - 29 May, 2015 - Comments: 0

Mergers & Acquisitions Synopsys' list of security acquisitions grew with a definitive agreement to buy certain assets of Quotium, including the interactive application security testing product Seeker and its R&D team. The acquisition builds on static analysis technology from Coverity and Codenomicon's fuzz testing and software vulnerability assessment tools. Terms of the deal have no... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 22 May, 2015 - Comments: 0

At an event, Samsung rolled out its 10nm finFET technology. The company also showed a 300mm wafer with 10nm finFET transistors. "We have silicon-based PDKs out," said Kelvin Low, senior director of foundry marketing for Samsung. Samsung plans to move into production with its 10nm finFET technology by the end of 2016, he said. IC Insights released its chip rankings in terms of sales in the fi... » read more

Week 49: Are We There Yet?
By Anne Cirkel - 15 May, 2015 - Comments: 0

When I was a little kid my parents would pack me and my sister into the car and drive to the Mediterranean for our summer camping vacation. It was quite a haul from our home on the west side of Germany near the border with Belgium to the south of France, and as is true of any long car trip, the last stretch was the hardest. After hours in the backseat, my sister and I would be craning our necks... » read more

FD-SOI Vs. FinFETs
By Ed Sperling - 13 May, 2015 - Comments: 3

Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

The Next Generation Of Wearables
By Ernest Worthman - 07 May, 2015 - Comments: 0

As the wearable market begins to take root, so has the focus on ultra-low power design—with some unique headaches that are unique to wearables. To begin with, there is much attention being paid to this market because of the almost staggering predictions associated with it. While numbers vary greatly, IDC predicts as many as 126 million units will be shipping annually by 2019. The five-year... » read more

FD-SOI Vs. FinFETs
By Ed Sperling - 30 Apr, 2015 - Comments: 0

Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

What EDA’s Big 3 Think Now
By Ed Sperling - 23 Apr, 2015 - Comments: 0

In the past two months the CEOs of Cadence, Synopsys and Mentor Graphics delivered their annual high-level messages to their respective user groups. Semiconductor Engineering attended all of the speeches at these conferences, as it did in 2014 (see story here). From a high level, the big issues for CEOs last year were Moore's Law, the costs of design, the impact of low power, and business-... » read more

Partly Sunny, With A Chance For Explosive Growth
By Mike Gianfagna - 23 Apr, 2015 - Comments: 0

I recently attended a session at the Mentor Graphics User Conference (User2User) in San Jose that dealt with the changing foundry landscape. The session was moderated by SemiWiki's Dan Nenni and included: • Giorgio Cesana, director of technology at STMicroelectronics • Jack Harding, co-founder, president & CEO of eSilicon • Lluis Paris, deputy director of worldwide IP alliances at ... » read more

Meeting Functional Safety Requirements Efficiently Via Electronic Design Tools And Techniques
By Cadence - 22 Apr, 2015 - Comments: 0

In an intelligent electronic system, unexpected errors can lead to unplanned, unexpected behavior. This can be a potentially dangerous proposition for, say, an automotive manufacturer, as well as a costly occurrence for consumer product developers. Compliance to the latest safety standards can be a laborious, time-consuming process. Fortunately, there are now technologies available that can aut... » read more

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