Chip Industry Technical Paper Roundup: Nov. 26


New technical papers recently added to Semiconductor Engineering’s library: [table id=494 /] Find more semiconductor research papers here. » read more

Emerging Synaptic Memory Technologies For Neuromorphic CIM Platforms (Tampere Univ.)


A new technical paper titled "Toward Capacitive In-Memory-Computing: A Device to Systems Level Perspective on the Future of Artificial Intelligence Hardware" was published by researchers at Tampere University. Abstract: "The quest for energy-efficient, scalable neuromorphic computing has elevated compute-in-memory (CIM) architectures to the forefront of hardware innovation. While memristive... » read more

Chip Industry Technical Paper Roundup: Sept 23


New technical papers recently added to Semiconductor Engineering’s library: [table id=478 /] Find more semiconductor research papers here. » read more

HW/SW Co-Design to Retarget the Compiler For RISC-V Custom Instructions (Tampere Univ.)


A new technical paper titled "Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions" was published by researchers at Tampere University. Abstract "Custom instruction (CI) set extensions are beneficial for increasing performance and energy efficiency in a set of target applications. For rapid prototyping of these types of application-specific processors, desig... » read more

Chip Industry Technical Paper Roundup: August 11


New technical papers recently added to Semiconductor Engineering’s library: [table id=463 /] Find more semiconductor research papers here. » read more

Double Intra-Cavity VCSELs: Properties And Design Challenges At Cryogenic Temperatures (Tampere Univ.)


A new technical paper titled "Thermal characteristics of a double intra-cavity contact VCSEL for cryogenic optical links" was published by researchers at Tampere University. Excerpt "Cryogenic computing systems, including quantum computers, cryo-CMOS and superconducting processors, necessitate efficient optical data links capable of operation at temperatures as low as 4 K. Vertical-cavity s... » read more

Chip Industry Technical Paper Roundup: July 29


New technical papers recently added to Semiconductor Engineering’s library: [table id=458 /] Find more semiconductor research papers here. » read more

HW/SW Co-Design Toolset for RISC-V (Tampere Univ.)


A new technical paper titled "Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions" was published by researchers at the Tampere University. Abstract "Custom instruction (CI) set extensions are beneficial for increasing performance and energy efficiency in a set of target applications. For rapid prototyping of these types of application-specific processors, d... » read more

Chip Industry Technical Paper Roundup: Dec 18


New technical papers added to Semiconductor Engineering’s library this week. [table id=176 /] More ReadingTechnical Paper Library home » read more

Dual Instruction-Set Architecture, Supporting A TTA And RISC-V Instruction Set Via a Lightweight Microcode Hardware Unit


A technical paper titled “Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode” was published by researchers at Tampere University. Abstract: "Transport triggered architectures (TTAs) follow the static programming model of very long instruction word (VLIW) processors but expose additional information of the processor datapath in the programming interface, whic... » read more

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