EDPS: Transitioning From 5G To 6G


At the recent EDPS, the keynote on the second day was by Mallik Tatipamula. He is the CTO of Ericsson Silicon Valley and also has experience all over the telecom industry with stints at F5, Juniper Networks, Cisco, Motorola, Nortel, and the Indian Institute of Technology Madras. Mallik started with a potted history of mobile. You may already know all this, and I've covered my version ... » read more

An Update On 5G And Aircraft Safety


The U.S. aircraft industry is in the final phases of adapting aircraft and airports to address concerns over potential 5G cellular signal interference of automated landing systems. The Federal Aviation Administration (FAA) has driven the process to determine the level of risk to aircraft and safeguard against problems for low-visibility approaches — such as during inclement weather — for ne... » read more

Developers Embrace Standards To Accelerate Growth Opportunities For The IoT


By the end of the decade, the potential economic value of the Internet of Things (IoT) is expected to reach $12.6 trillion (yes, that’s a ‘t,’ not a typo), according to a McKinsey study. To achieve the scale required to meet this opportunity, critical IoT standards are coming together to enable the frictionless deployment of secure endpoint-to-cloud solutions – and being embraced by th... » read more

What’s So Different About Interposer Signal Integrity?


By Kelly Damalou and Pete Gasperini To achieve gains in power, performance, area, and cost, 3D-IC architectures are pushing electronics design to new limits. Silicon integration technology and associated devices have undergone an impressive evolution over the last several decades. Their development encourages technological advancement in applications like high-performance computing, Artificial... » read more

Heterogeneous Integration Co-Design Won’t Be Easy


The days of “throwing it over the wall” are over. Heterogeneous integration is ushering in a new era of silicon chip design with collaboration at its core—one that lives or dies on seamless interaction between your analog and digital IC and package design teams. Heterogeneous integration is the use of advanced packaging technologies to combine smaller, discrete chiplets into one syste... » read more

The New Disruptive Force In High-End AIoT Markets


MediaTek is known for its SoC solutions in the mobile and consumer device markets. In fact, the smartphone market is now producing the most advanced and performant SoC designs on the planet. MediaTek is a vital part of this innovation. Each year it produces a range of chipsets for the mobile market, like the flagship Dimensity 9000 which adopted Arm’s v9 CPU and Mali-GPU technologies to del... » read more

Meeting Today’s Challenges For LVS


At least one thing is for certain in semiconductor development: bigger and more complex designs put lots of pressure on electronic design automation (EDA) tools and methodologies. Yesterday’s chip is today’s IP block, and entire racks of electronics are being packed into system-on-chip (SoC) devices. EDA tools must evolve constantly in order to keep pace with size and complexity while meeti... » read more

Coming In Hot: Requirements For Successful Thermal Management In 3D-IC


As the speed, density, and capabilities of electronics have all increased, power has become a first order driver in almost all electronic systems. For instance, it’s well recognized that heat is often the number one limiting factor in 3D-IC design. High-speed chips stacked close together in a small housing cause things to heat up fast. One of the most common designer responses to overheating ... » read more

Recipe To Catch Bugs Faster Using Machine Learning


We all agree that verification and debug take up a significant amount of time and are arguably the most challenging parts of chip development. Simulator performance has consistently topped the charts and is a critical component in the verification process. Still, the need of the hour is to stretch beyond simulator speed to achieve maximum verification throughput and efficiency. Artificial in... » read more

Minimizing EM/IR Impacts On IC Design Reliability And Performance


By Joel Mercier and Karen Chow As technologies and foundry process nodes continue to advance, it gets more difficult to design and verify integrated circuits (ICs). The challenges become even more apparent in 5nm and below nodes, and as the industry moves away from fin field-effect transistor (finFET) and into gate-all-around field-effect transistor (GAAFET) technologies. There are many prob... » read more

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