category: Test, Measurement and Analytics

category: Auto, Security & Edge AI

2.5D Adds Test Challenges
By Jeff Dorsch - 06 Mar, 2017 - Comments: 0

OSATs and ATE vendors are making progress in determining what works and what doesn't in 2.5D packaging, expanding their knowledge base as this evolves into a mainstream technology. A [getkc id="82" kc_name="2.5D"] package generally includes an ASIC connected to a stack of memory chips—usually high-bandwidth memory—using an [getkc id="204" kc_name="interposer"] or some type of silicon bri... » read more

The Final Days…Getting To Sign-Off Faster With Calibre
By Mentor, a Siemens Business - 06 Mar, 2017 - Comments: 0

With deadlines looming, the design flow between router output and final tape release can be stressful and frustrating. By combining a focused set of commands into macros, the Calibre YieldEnhancer tool enables designers to create customized, automated flows for engineering change order (ECO) filling, passive device insertion, custom fill to increase densities, jog removal, and via enhancements.... » read more

Crossing The Chasm: Uniting SoC And Package Verification
By Tarek Ramadan - 06 Mar, 2017 - Comments: 0

Wafer-level packaging enables higher form factor and improved performance compared to traditional SoC designs. However, to ensure an acceptable yield and performance, EDA companies, OSAT companies, and foundries must collaborate to establish consistent and unified automated WLP design and physical verification flows, while introducing minimum disruption to already-existing package design flows.... » read more

What Next For OSATs
By Mark LaPedus - 06 Mar, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss IC-packaging and business trends with Tien Wu, chief operating officer at Taiwan’s Advanced Semiconductor Engineering ([getentity id="22930" comment="ASE"]), the world’s largest outsourced semiconductor assembly and test (OSAT) vendor. What follows are excerpts of that conversation. SE: What’s the outlook for the IC industry in 2017? Wu:... » read more

OSAT Biz: Growth And Challenges
By Mark LaPedus - 08 Feb, 2017 - Comments: 0

Amid a challenging business environment, the outsourced semiconductor assembly and test (OSAT) industry is projected to see steady to strong growth in a number of packaging segments this year. Right now, the [getkc id="83" kc_name="OSATs"]—which provide third-party IC-packaging and test services—are seeing brisk demand for both legacy and advanced chip packages. In addition, IDMs continu... » read more

Addressing Test Time Challenges
By Rohit Dixit - 08 Feb, 2017 - Comments: 0

Unit test time on automated test equipment (ATE) is one of the major components that affects the total cost of manufacturing for semiconductor suppliers. The test programs for each unit can be comprised of thousands of parametric and functional tests that are performed to screen out defective units or dies. However, tester time is expensive, so suppliers are always looking for ways to reduce th... » read more

More Degrees Of Freedom
By Ed Sperling - 06 Feb, 2017 - Comments: 0

Ever since the publication of Gordon Moore's famous observation in 1965, the semiconductor industry has been laser-focused on shrinking devices to their practical, and more recently, impractical limit. Increasing transistor density has encountered a number of problems along the way, but it also has enabled us to put computers—which once filled specially built rooms—onto the desktop firs... » read more

Advanced 3D eWLB-PoP Technology
By STATS ChipPAC - 06 Feb, 2017 - Comments: 0

The emergence and evolution of any package technology is driven by market trends as experienced by the end application. With the maturation of the mobile market, the trends for Smartphone and other mobile devices are more than ever for lower cost. Meanwhile, a higher degree of functionality and performance, thinner profile, and longer battery life are some of the additional market drivers seen ... » read more

Outlier Detection
By Optimal Plus - 06 Feb, 2017 - Comments: 0

With increasing focus on quality and reliability across all segments beyond just automotive, medical and mil-aero, it is more critical than ever for companies to leverage every byte of test data at their disposal to ensure that they deliver the lowest possible DPPM (defective parts per million) rates to their customers. Semiconductor manufacturing operations now generate up to 100TB of test ... » read more

Implementing Fan-Out Wafer-Level Packaging with Mentor Graphics
By Mentor, a Siemens Business - 06 Feb, 2017 - Comments: 0

Fan-out wafer-level packaging (FOWLP) is a new high-density packaging technology that is rapidly gaining popularity. What is it? Who needs it? How do you take advantage of it? What limitations does it have? Learn all about FOWLP and our comprehensive tool integration and support for the design and verification of FOWLP products. To read more, click here. » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy