The Future of Package Design Verification: Assembly Design Kits


Chip design companies and package assembly houses have no unified signoff verification process to ensure that an IC package meets manufacturability and performance requirements. Packages need a process that confirms the disparate products they contain can be manufactured within a single package. Mentor Graphics collaborated with Qualcomm and STATS ChipPAC to develop a prototype assembly design ... » read more

Advanced Packaging Is Real. Now What?


For the past five years, it's been clear that 2.5D, fan-outs and other forms of system-in-package were on the horizon. Exactly when they would arrive no one knew. The most common prediction was that the timing would depend on when one of the big chipmakers decided to go down that route. The theory was that the remainder of the industry would follow, ecosystem issues would be sorted out—partic... » read more

Fan-Out Packaging Gains Steam


Fan-outs are creating a buzz and gaining steam in the market at a pace far beyond what anyone would have expected even at the start of the year. The approach, which has been around for several years, is a wafer-level packaging process that enables ultra-thin, high-density packages. So why the buzz? Apple is apparently moving to [getkc id="202" kc_name="fan-out"] packaging, according to an... » read more

Packaging Wars Ahead


There has been much talk about semiconductor industry consolidation, but the shift into advanced packaging could have more far-reaching effects than all the mega-deals so far. Packaging is big business. Yole Développement has pinned the market at $30 billion, but that's only a thin slice of the pie that's in play. Companies that win the packaging deals also have a good shot of winning the m... » read more

Tech Talk: 14nm And Stacked Die


Aashish Malhotra, marketing director for the ASIC Business Unit at GlobalFoundries, talks about 14nm process technology, the IP ecosystem, and why that technology node will be used as a platform for 2.5D and 3D stacked die across a wide range of markets including the Internet of Everything. [youtube vid=ukTRuedB7ZU] » read more

Programming Devices At In-Circuit Test


Manufacturers have a great deal of flexibility when deciding where and how to program their devices. Components can be programmed at many stages during the procurement and manufacturing process. This Teradyne white paper explains why in-circuit test is the ideal stage in the production line to program firmware into components or data into flash memory. Download this white paper to learn h... » read more

Tech Talk: 2.5D Stacked Die


What's the motivation for moving to 2.5D packaging and architectures rather than following Moore's Law? Shafy Eltoukhy, VP of operations and technology development at Open-Silicon, talks with Semiconductor Engineering about adding another dimension in semiconductors. [youtube vid=HwpY9bUNt0w] » read more

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