category: System-Level Design

category: Auto, Security & Edge AI

Speeding Up Neural Networks
By Ed Sperling - 27 Apr, 2017 - Comments: 2

Neural networking is gaining traction as the best way of collecting and moving critical data from the physical world and processing it in the digital world. Now the question is how to speed up this whole process. But it isn't a straightforward engineering challenge. Neural networking itself is in a state of almost constant flux and development, which makes it something of a moving target. Th... » read more

Wear Down Your Virtual Prototype
By Malte Doerper - 27 Apr, 2017 - Comments: 0

Just when you think you know all variations of embedded software development you are exposed to another domain of unique and interesting challenges. This happened to me awhile back when I started to learn about the software for Flash Memory controllers. You can read a lot about Flash market growth predictions or about the physical challenges of the next generation storage technologies he... » read more

Design Complexity Drives New Automation
By Ann Mutschler - 27 Apr, 2017 - Comments: 0

As design complexity grows, so does the need for every piece in the design flow—hardware, software, IP, as well as the ecosystem — to be tied together more closely. At one level, design flow capacity is simply getting bigger to accommodate massive [getkc id="185" kc_name="finFET"]-class designs. But beyond sheer size, there are new interactions in the design flow that place much more emp... » read more

Avoiding A $7.7B Chip Design Cost
By Frank Schirrmeister - 27 Apr, 2017 - Comments: 0

For years, the story about semiconductor development cost and about EDA contributions has been pretty simple. Cost has been, is, and will likely be for a while, the single biggest issue in scaling development for more complex designs. The next big leap for verification productivity will be the close integration of verification and design engines, both vertically and horizontally as I have writt... » read more

Historic FinFET/2.5D Firsts
By Mike Gianfagna - 27 Apr, 2017 - Comments: 0

Recently, I had an opportunity to watch the Academy Award nominated movie “Hidden Figures.” If you’re a geek at heart, you need to see this movie. It chronicles the strong contributions of three black women to the NASA space program during the 1960s. The civil rights backstory of the movie is powerful, but there is another aspect of the movie that stayed with me as well: all of the “fir... » read more

Why Is TCAM Essential For The Cloud?
By eSilicon - 27 Apr, 2017 - Comments: 0

With port speeds exceeding 100Gbps, route lookups that are fundamental to all routers have relied on ternary content addressable memories (TCAMs) to provide a lookup response within a clock cycle. However, TCAMs in discrete form are expensive, consume a lot of power, compete for precious real estate on the printed circuit board (PCB), and often lack required flexibility. Embedding a TCAM block ... » read more

Software Driven Test Of FPGA Prototype
By Krzysztof Szczur - 27 Apr, 2017 - Comments: 0

Most everyone would agree how important FPGA prototyping is to test and validate an IP, sub-system, or a complete SoC design. Before the design is taped-out it can be validated at speeds near real operating conditions with physical peripherals and devices connected to it instead of simulation models. At the same time, these designs are not purely hardware, but these days incorporate a significa... » read more

The Democratization Of CFD
By Mentor, a Siemens Business - 26 Apr, 2017 - Comments: 0

“Democratization” is a buzzword that has been circulating around the Computational Fluid Dynamics (CFD) community for some time. In this White Paper, Keith Hanna and Ivo Weinhold of Mentor Graphicsdefine the issue, establish the facts, look at the pros and cons of various technology solutions being offered in the market today, and then suggest some pointers for the future as the CFD industr... » read more

IC Validator Programmable EERC Mixed Mode Checking Technology
By Synopsys - 26 Apr, 2017 - Comments: 0

Traditional visual inspection or manual checking for electrical rule compliance is both time consuming and error prone. A new, comprehensive reliability solution is needed to reduce time to market, improve reliability and ensure longer device operation. This paper is a companion to the introductory IC Validator programmable Extended Electrical Rule Check (EERC) white paper on netlist domain che... » read more

Automotive SoC Maker Saves Time, Enhances Product QoS For Advanced Real-Time Video Image Recognition
By Arteris - 26 Apr, 2017 - Comments: 0

Automated driver assistance systems (ADAS) used to be expensive until Mobileye figured out how to use inexpensive cameras with advanced visual processing to help make cars autonomous. In this 4-page paper, created with the participation of Mobileye, you will learn how the world's #1 vision-based ADAS company uses Arteris FlexNoC interconnect IP to address demanding high bandwidth and low-latenc... » read more

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