category: System-Level Design

category: Auto, Security & Edge AI

Commercial Chiplet Ecosystem May Be A Decade Away
By Ann Mutschler - 29 Feb, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the challenges of establishing a commercial chiplet ecosystem with Frank Schirrmeister, vice president solutions and business development at Arteris; Mayank Bhatnagar, product marketing director in the Silicon Solutions Group at Cadence; Paul Karazuba, vice president of marketing at Expedera; Stephen Slater, EDA product mana... » read more

Brain-Inspired, Silicon Optimized
By Barry Pangrle - 29 Feb, 2024 - Comments: 0

The 2024 International Solid State Circuits Conference was held this week in San Francisco. Submissions were up 40% and contributed to the quality of the papers accepted and the presentations given at the conference. The mood about the future of semiconductor technology was decidedly upbeat with predictions of a $1 trillion industry by 2030 and many expecting that the soaring demand for AI e... » read more

Accellera Preps New Standard For Clock-Domain Crossing
By Brian Bailey - 29 Feb, 2024 - Comments: 0

Part of the hierarchical development flow is about to get a lot simpler, thanks to a new standard being created by Accellera. What is less clear is how long will it take before users see any benefit. At the register transfer level (RTL), when a data signal passes between two flip flops, it initially is assumed that clocks are perfect. After clock-tree synthesis and place-and-route are perfor... » read more

What’s Next For Power Electronics? Beyond Silicon
By Emily Yan - 29 Feb, 2024 - Comments: 0

For more than half a century, silicon has been the bedrock of power electronics. Yet as silicon meets its physical limitations in higher-power, higher-temperature applications, the industry’s relentless pursuit of more efficient power systems has ushered in the wide bandgap (WBG) semiconductors era. The global WBG semiconductors market reached $1.6 billion in 2022, with an estimated CAGR of ... » read more

NoC Development – Make Or Buy?
By Frank Schirrmeister - 29 Feb, 2024 - Comments: 0

In the selection and qualification process for semiconductor IP, design teams often consider the cost of in-house development. Network-on-Chip (NoC) IP is no different. In “When Does My SoC Design Need A NoC?” Michael Frank and I argued that most of today’s designs – even less complex ones – can benefit from NoCs. In the blog “Balancing Memory And Coherence: Navigating Modern Chip A... » read more

Navigating IoT Security
By Dana Neustadter - 29 Feb, 2024 - Comments: 0

By Dana Neustadter (Synopsys), Ruud Derwig (Synopsys), and Martin Rösner (G+D) IoT expansion requires secure and efficient connectivity between machines. Integrated SIM technology and remote SIM provisioning can make this possible. Subscriber Identity Module (SIM) cards have been around for a long time, with Giesecke+Devrient (G+D) developing and delivering the first commercial SIM car... » read more

Weak Verification Plans Lead To Project Disarray
By Anika Sunda - 29 Feb, 2024 - Comments: 0

The purpose of the verification plan, or vplan as we call it, is to capture all the verification goals needed to prove that the device works as specified. It’s a big responsibility! Getting it right means having a good blueprint for verification closure. However, getting it wrong could result in bug escapes, wasting of resources, and possibly lead to a device failing altogether. With the foc... » read more

Maximizing Efficiency And Productivity: The Benefits Of Shift Left Verification For IP Designers
By Terry Meeks - 29 Feb, 2024 - Comments: 0

Intellectual property (IP) designers play a crucial role by creating reusable components that form the building blocks of larger integrated circuit (IC) designs. These components, whether developed in-house or acquired from specialized IP design companies, are essential for providing core functionality such as memory and standard libraries. However, designing and verifying IP is a complex and d... » read more

A Game-Changer For IP Designers: Design-Stage Verification
By Siemens EDA - 28 Feb, 2024 - Comments: 0

Discover how to transform your IP design process with the Calibre Shift left initiative. In this new technical paper, you’ll gain valuable insights into how, by moving physical verification earlier in the IP design flow, you can locate and correct design errors sooner, reducing costs and getting complex designs to market faster. Dive into the challenges of hard, soft and custom IP creation, a... » read more

Blog Review: Feb. 28
By Jesse Allen - 28 Feb, 2024 - Comments: 0

Synopsys' Emilie Viasnoff suggests that employing virtual sensors when developing an autonomous driving system helps aid in sensor design and minimizes the hazards associated with extensive real-world driving. Cadence's Anthony Ducimo introduces a methodology for embedded BootROM verification that relies only on standard RTL verification toolchains to reveal bugs, identify unused sections of... » read more

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