Chip Industry Week In Review

The Design Automation Conference morphed into the Chips to Systems Conference, reflecting an industry shift from monolithic SoCs to assemblies of chiplets in various flavors of advanced packaging. The change drew a slew of students and a resurgent buzz, fueled by discussions about heterogeneous integration, reliability, and ways to leverage AI/ML to speed up design and verification processes.

Keynote speakers at the conference included (L-R, below) Jim Keller, CEO of Tenstorrent; Gary Patton, corporate vice president at Intel; Sarita Adve, professor at the University of Illinois Urbana-Champaign, and Alan Lee, CTO at Analog Devices. Photos: Brian Bailey and Jesse Allen/Semiconductor Engineering

Interface, a technology analysis firm, released a major study titled “Chip Production’s Ecological Footprint: Mapping Climate and Environmental Impact,” warning that emissions could increase by a factor of eight if the EU Chips Act delivers on its 20% global production goal by 2030. The paper zeros in on where the chip production process is most harmful to the environment and where more sustainable practices can make a difference.

Fig. 1: Projected GHG emissions of the European semiconductor industry in 2030. Source: Interface

The Biden administration announced a preliminary $75 million CHIPS ACT funding agreement with Entegris, supporting construction of an advanced materials and process manufacturing center in Colorado. The facility is expected to be operational next year.

The U.S. proposed new regulations to curtail American investments in Chinese technologies posing a national security threat, specifically calling out semiconductors and microelectronics, quantum information technologies, and AI. The 165-page proposal defines prohibited transactions (page 133-134 for semiconductor restrictions).

The SIA launched a new resource to track the $13 billion in CHIPS R&D Programs, including the National Semiconductor Technology Center (NSTC), Advanced Packaging Manufacturing Program (NAPMP), CHIPS Metrology Program, Manufacturing USA Institute, and the DoD Microelectronics Commons programs.

JEDEC published support standards for Compute Express Link (CXL) to define the function and configuration of memory modules that support CXL specifications, as well as the standardized content for labels for these modules.

Accellera formed the Federated Simulation Standard (FSS) Working Group, which aims to establish cross-industry collaboration to improve the interoperability of product and environment simulation, models, and components by connecting existing standards in industries such as avionics, space, semiconductor, automotive, and mechatronics with new open standards.

Several EDA companies announced flows for Intel’s embedded multi-die interconnect bridge (EMIB) assembly technology and 18A process, plus other developments:

• Synopsys introduced a multi-die reference flow and IP for Intel’s EMIB that enables exploration and development of multi-die designs at all stages, including optimization for signal, power, and thermal integrity.
• Cadence announced an EMIB reference flow that covers system-level planning, physical optimization and analysis to DRC-aware implementation and physical signoff. Cadence’s digital and custom/analog full flows were also certified for Intel 18A, along with IP including PCIe 6.0, CXL, LPDDR5X PHY, UCIe, and 112G extended long-reach SerDes.
• Siemens’ Solido SPICE simulators were certified for Intel 16 and 18A nodes. Siemens also introduced an EMIB reference flow that includes validation of EMIB silicon layouts for DRC, LVS, and 3DThermal analysis.
• Ansys developed an enhanced thermal management flow with the RedHawk-SC platform that supports the Intel 18A silicon manufacturing process and will offer signoff verification of thermal and power integrity and mechanical reliability of EMIB. Ansys also joined the Intel Foundry Accelerator United States Military, Aerospace, and Government (USMAG) Alliance to deliver secure design methodologies and flows for U.S. security applications. And its power integrity solutions were certified for use with Samsung Foundry’s SF2Z 2nm GAA process.

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In-Depth
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Global

The South Korea government’s nearly $US 19 billion “Semiconductor Ecosystem Support Package” will start distributing funds next month, starting with low-interest loans and favorable tax benefits.

France’s CEA-Leti kicked off its FAMES Pilot Line, a nearly $900 million project. In addition to the coordinator CEA-Leti, the pilot line will be open to a consortium of leaders including imec, Fraunhofer, Tyndall, VTT and others, and will focus on FD-SOI, embedded NVM, RF components, 3D integration, and PMIC.

Nexperia plans to invest US$ 200 million at its current Hamburg, Germany site for development of next-generation SiC, GaN and production infrastructure.

Ion implantation supplier Axcelis is branching out and opening new service offices in Chitose, Hokkaido, and Kumamoto, Kyushu to support the Company’s expanding customer base in Japan.

U.S., Japan, and Korea officials met this week to strategize on strengthening supply chains, including semiconductors, critical materials, and batteries.

China‘s ByteDance is working with Broadcom to develop an advanced AI processor, a 5 nm ASIC that would comply with U.S. export restrictions to be manufactured by TSMC, according to Reuters sources.

In the Middle East, Qatari telecom company Ooredoo partnered with NVIDIA and will deploy thousands of its Tensor Core GPUs in AI data centers to support governments, enterprises, and startups in Qatar, Algeria, Tunisia, Oman, Kuwait, and the Maldives.

The South Korean government partnered with Israeli venture capital company OurCrowd, creating an $80 million investment fund for startups focused on semiconductors, robotics, automotive, digital health, and quantum computing, per the Times of Israel.

In-Depth

Semiconductor Engineering published its Systems and Design newsletter this week, featuring these top stories:

• Digital Twins Gaining Traction In Complex Designs
• Data Coherence Across Silos And Hierarchy
• Design Flow Challenged By 3D-IC Process, Thermal Variation

More reporting this week:

• Moving Software-Defined Vehicles Forward
• Controlling Warpage In Advanced Packages

Markets and Money

Renesas advised it will indirectly acquire three companies as consolidated subsidiaries following the acquisition of stock of Altium Limited.

Arm joined the Nasdaq-100 Index.

Etched raised $120 million in Series A funding to build an algorithm-specific ASIC targeted solely for inference of transformer models. Also, AI hardware accelerator company Axelera received $68 million in Series B funding.

New companies that emerged from stealth recently:

• Baya Systems, which offers a software platform for the design and exploration of memory and cache architectures and on-die fabric microarchitectures, along with IP components to build a unified fabric with a scalable transport architecture.
• Orca Semiconductor, a developer of power management ICs for health wearables, hearables, and other connected devices.

DRAM prices are expected to rise by 8% to 13% due to a recovery in demand for general servers and a higher production share of HBM by DRAM , according to TrendForce.

Yole Group published several reports:

• The MEMS market is predicted to reach $20 billion in 2029 at a 5% CAGR from 2023 to 2029.
• 2023 annual DRAM revenue was $52 billion, the lowest since 2016, but in Q1 2024, the DRAM industry achieved an average operating margin of 18%, driven by Samsung, SK Hynix, and Micron.
• After five quarters of losses, Q1 2024 saw a return to profitability for the NAND industry.

Global cellular IoT module shipments rose 7% year over year in Q1 2024, mainly driven by demand in China and India, reported Counterpoint. China’s smartphone sales rose 6.8% YoY during its annual shopping festival.

Security

University of Florida researchers introduced a large language model (LLM) approach for large-scale SoC security verification and policy generation, called SoCureLLM.

Duke University and Arizona State University researchers presented ALT-Lock, a logic ambiguity-based IP obfuscation method to guard against reverse engineering.

Rochester Institute of Technology (RIT) researchers developed cybersecurity protocols to prepare connected cars for post-quantum cryptography.

The EU Agency for Cybersecurity (ENISA) is seeking feedback concerning the certification of the embedded Universal Integrated Circuit Card (eUICC) under the European Cybersecurity Certification Scheme (EUCC).

The Cybersecurity and Infrastructure Security Agency (CISA), the Federal Bureau of Investigation (FBI), the Australian Cyber Security Center, and Canadian Cyber Security Center released guidance for exploring memory safety in open source projects. CISA also issued a number of alerts/advisories.

The U.S. Securities and Exchange Commission (SEC) updated guidance for companies notifying the government about material cybersecurity incidents, under Section 104B. Item 1.05.

Education and Training

Purdue University is partnering with SEMI to create online courses aimed at building the semiconductor workforce. The courses will be available via the SEMI University (SEMI U) learning platform and Purdue will issue digital badges certifying that learners completed the course and gained relevant knowledge and skills.

The U.S. Department of Commerce, with the departments of labor and education, expanded the SelectTalentUSA initiative to better serve foreign semiconductor and supply chain firms seeking to establish or expand U.S. operations. The initiative helps foreign businesses deliver recruitment and training programs for their U.S. workforce.

Product News

Intel announced a 64-channel optical compute interconnect chiplet with 32Gbps bi-directional speeds over fiber at distances up to 100 meters. The chiplet is targeted at CPU/GPU clusters and distributed memories.

Multibeam Corp. introduced its Multicolumn E-Beam Lithography (MEBL) system, a fully automated precision-patterning system for rapid prototyping, advanced packaging, high-mix production, chip ID, compound semiconductors, and other applications.  SkyWater Technology received the first production system.

proteanTecs unveiled Real-Time Safety Monitoring (RTSM), a deep data application for fault detection and failure prevention in mission-critical automotive applications.  The tool allows systems to stay always-on while receiving immediate alerts about faults before they become errors.

Lam Research released its 2023 Environment, Social, and Governance (ESG) report, highlighting strides made in renewable electricity, water reclamation, emission reductions, and other sustainability breakthroughs.

Cadence unveiled network-on-chip (NoC) IP that can manage simultaneous high-speed communications efficiently with minimal latency. It features built-in power management, clock domain crossing, and width matching and can take advantage of other Cadence tools to enable early architectural exploration.

Infineon expanded its AIROC range with CYW5591x Connected MCUs, integrating long-range Wi-Fi 6/6E and Bluetooth Low Energy 5.4 with a secured MCU for smart home, industrial, wearables, and IoT applications.

Samsung Semiconductor India Research (SSIR) selected Keysight‘s Signaling Field-To-Lab solution to streamline and automate its 5G field-to-lab workflow.

Siemens announced a slate of new products:

• An integrated suite of AI-accelerated SPICE, Fast SPICE, and mixed-signal simulators for design and verification of analog, mixed-signal, and custom IC designs.
• A consolidated cockpit for constructing a digital twin of the complete semiconductor package assembly, featuring a unified data model for design planning, prototyping, and predictive analysis of 2.5D, 3D-IC, and other advanced packaging technologies and substrates.
• Software for complete chip and package-inward thermal analysis, verification, and debugging for 3D-ICs
• A context-aware electrostatic discharge (ESD) verification solution for checking compliance against foundry rules spanning all phases of IC design.
• Olympia Express is using Siemens Xcelerator portfolio to transform the design and production of its espresso machines.

Research

CEA-Leti presented three papers at the recent VLSI Symposium in Hawaii, including:

• Stacking an AlGaN/GaN/Si HEMT on CPW lines fabricated on 200mm substrate,
• Stacking 5G-compatible (30GHz) RF circuits directly above a working digital circuit, and
• Unlocking a low-temperature showstopper in 400°C analog devices.

Oak Ridge National Laboratory (ORNL) researchers demonstrated that GaN semiconductors can withstand the harsh environment near a nuclear reactor core.

Fig. 3: New gallium nitride transistors under the microscope. Source: ORNL

Researchers at the University of Duisburg-Essen and the Norwegian University of Science and Technology discovered that topological magnetic and ferroelectric systems can be leveraged for reservoir computing.

Events and Further Reading

Find upcoming chip industry events here, including:

Upcoming webinars are here.

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