Chip Industry Week In Review

SK hynix’s 321-high NAND; Cadence’s system chiplet; Eliyan’s interconnect chiplet; CEO turnovers; GF’s funding finalized; SRC’s digital twin win; chiplets ramp; Enfabrica funding; NAND flash standard.

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SK hynix started mass production of 1-terabit  321-high NAND, with availability scheduled for the first half of next year.

Rapidus will receive an additional ¥200 billion yen ($1.28B) from the Japanese government beginning in fiscal year 2025, reports Nikkei. This is on top of ¥920 billion yen ($5.98B) Rapidus has already received from the government in support of its goal to reach commercial production by 2027.

U.S. Government Funding:

  • GlobalFoundries finalized a $1.5B CHIPS Act award. The money, which will be tied to project milestones, will augment a $13B investment by the company to expand manufacturing in New York and Vermont.
  • Up to $300M in CHIPS Act funding will be invested in advanced packaging research projects, benefiting Absolics, Applied Materials, and Arizona State University.
  • Semiconductor Research Corp. will receive $285M for digital twin technologies as part of a $1 billion investment to establish SMART USA in Durham, North Carolina.

Special Report: High-bandwidth memory (HBM) sales are spiking as the amount of data that needs to be processed quickly by state-of-the-art AI accelerators, graphic processing units, and high-performance computing applications continues to explode. But manufacturing reliable 3D DRAM stacks with good yield is complex and costly.

Chiplets were a hot topic this week:

  • Cadence taped out a prototype of a system chiplet, based on Arm‘s Chiplet System Architecture, that includes processors, system IP, and memory IP in a single package, all connected with UCIe.
  • Eliyan taped out a high-performance chiplet interconnect solution in a x64 UCIe Advanced Package Module based on Samsung Foundry’s 4nm process.
  • Keysight unveiled its new EDA software portfolio. EDA 2025 can reduce model recentering time and can create digital twins of chiplets, USB, and PCIe.

The global semiconductor industry showed  quarter-on-quarter growth across all key indicators for the first time in two years, according to SEMI. Q3 2024 saw an 8% rise in electronics sales and a 12% increase in IC sales. Memory-related CapEx jumped 34% QoQ, and total CapEx is projected to grow 27% QoQ in Q4 2024. Wafer fab equipment spending rose 15% YoY, with China playing a significant role.

Quick links to more news:

Markets and Money
In-Depth
Global
People
Security
Education and Training
Products and Standards
Research
Events and Further Reading


Markets and Money

In market reports:

  • DDR4 and LPDDR4X prices are falling due to high supply and weak demand, reports TrendForce. While DDR5 and LPDDR5X face less pressure, the outlook for advanced DRAM is uncertain.
  • Semiconductor revenues will grow nearly 13% in 2024, reaching more than $617B, predicts TECHCET, with significant 27% growth forecast for 2025.

New fundings:

  • Silicon Valley-based Enfabrica raised $115M in Series C financing.
  • Germany-based Ubitium raised $3.7M seed funding and touted a “universal RISC-V processor.”

Earnings releases this week: Keysight Technologies and  NVIDIASTMicroelectronics outlined a financial plan through 2028.

Swedish battery maker Northvolt AB filed for Chapter 11 reorganization in the US.

Synaptics announced the pricing of $400 million convertible notes, worth an aggregate principal amount of 0.75% and due 2031, in a private offering.


In-Depth

Semiconductor Engineering published its Manufacturing, Packaging & Materials newsletter this week, featuring these top stories:

  • Special Report: HBM Options Increase As AI Demand Soars
  • FOPLP Gains Traction in Advanced Semiconductor Packaging
  • Tradeoffs In Leading-Edge Chip Design

More reporting this week:

  • One Chip Vs. Many Chiplets
  • Asia Government Funding Surges
  • Using Formal For RISC-V Security

Global

Each country in Asia has a plan to maintain a foothold in the semiconductor global market, from China’s Big Fund to Korea’s Yongin Cluster and Japan’s Rapidus consortium. Meanwhile, India and Southeast Asia have launched numerous programs to attract international companies and build talent pipelines to support new facilities.

Samsung plans to open its Giheung, South Korea campus in mid-2025, a research complex for memory, system LSI, and foundry semiconductor R&D.

Mitsubishi Electric plans to open its new Japanese SiC plant in October 2026.

Huawei plans to mass produce its advanced AI chip early next year, despite low yield, reports Reuters.

The Center for Strategic & International Studies published reports titled, “The Double-Edged Sword of Semiconductor Export Controls: Semiconductor Manufacturing Equipment” and “China’s Mature Semiconductor Overcapacity: Does It Exist and Does It Matter?”



People

CEO turnovers announced this week:

  • CEO Gregg Lowe will leave Wolfspeed. A search is underway for a permanent replacement.
  • Microchip CEO Ganesh Moorthy is retiring at the end of this month.

New leaders:


Security

Finding and closing up security holes is becoming more important as chips are used in safety- and mission-critical applications. RISC-V is of particular concern, but one solution is to use formal verification in collaboration with the new Capability Hardware Enhanced RISC Instruction for Internet of Things (CHERIoT).

Microsoft revealed its latest in-house security chip, the Azure Integrated HSM, which will meet FIPS 140-3 Level 3 security requirements.. The module is designed to eliminate network access latencies.

CWE released its 2024 list of the top 25 most dangerous software weaknesses.

Recent security research:

  • Circuit-level techniques for side-channel attack resilience: A tutorial (Purdue)
  • Investigation of security vulnerabilities in NVM-based persistent TinyML hardware (IIT New Delhi)
  • TinyML security: Exploring vulnerabilities in resource-constrained machine learning systems (Harvard U., et al.)
  • Clock glitch-based fault injection attack on deep neural network (Hoseo U.)

The U.S. Senate Judiciary Committee held a hearing, “Big Hacks & Big Tech: China’s Cybersecurity Threat.”

The U.S. Department of Commerce and State launched the International Network of AI Safety Institutes.

CISA released insights from a red team assessment of a U.S. critical infrastructure sector organization; launched a new learning platform to help train veterans and other stakeholders; and issued a number of alerts/advisories.


Research

In the latest TOP500 supercomputing ranking, the El Capitan system at the Lawrence Livermore National Laboratory took first place with an HPL score of 1.742 EFlop/s, with 11,039,616 combined CPU and GPU cores.. The Frontier system at Oak Ridge National Laboratory (ORNL) came in second, and the Aurora system at Argonne Leadership Computing Facility came in third.

ORNL’s Frontier supercomputer also set a new bar for simulating the universe.

Princeton and Stanford engineers developed a new algorithm to compress LLM data so that the model could be stored and accessed locally on a device instead of a centralized server.

Imec developed an on-chip spectral imaging solution for satellites.

SiPhox, a startup by MIT alumni, developed an integrated photonic chip for home-based blood testing, while UC San Diego researchers developed a wearable ultrasound patch for continuous blood pressure monitoring.

Brown University researchers introduced a benchmark to measure the time to pre-train models on given GPUs and identify ideal settings for boosting speed, aiming to help academic researchers conduct experiments that require training larger models.


Education and Training

Arm donated £3.5M to enable 15 PhD students to study at the University of Cambridge’s Computer Architecture and Semiconductor Design Centre over the next five years.

Ansys won a contract to provide its Learning Hub to the Microelectronics Commons, which is supported by the Department of Defense. The program will be used to help educate student engineers on security-related areas.

Arizona launched a Future48 Workforce Accelerator at GateWay Community College. Developed in partnership with Intel and TSMC, the facility will feature a full-size mock clean room to enhance hands-on semiconductor training.

TSMC Arizona partnered with local educational institutes to expand its apprenticeship program, aiming to train over 130 apprentices by 2025, per ABC15.

Austin Community College District is launching a nationwide expansion of its Advanced Manufacturing Production semiconductor training program, with partners such as Merit America and the America’s Frontier Fund Foundation.

Eindhoven University of Technology received initial funding from the Netherlands government to produce about 70% more master students across semiconductor-related programs as part of the country’s €2.5B Beethoven project. TU/e also marked its first graduates from a master’s in AI and engineering systems program.


Products and Standards

JEDEC announced publication of an enhanced NAND flash interface standard with increased speeds and efficiency.

Advantest launched the Wave Scale RF20ex for its V93000 test platform, doubling the RF ports per instrument compared to previous models and enabling customers to test virtually all types of RF devices with one instrument.  The company also introduced the PMUX02 Power Mux multiplexer for the V93000, designed for multi-site testing of power and analog devices, including automotive ICs and battery management systems.

Ansys is incorporating NVIDIA’s Modulus AI framework into its simulation products. Modulus is a physics-AI framework that allows designers to create customized AI engines. The companies also collaborated to run a 2.4 billion cell automotive external aerodynamics simulation, the largest Fluent CFD simulation ever run on the latter’s GH200 Grace Hopper Superchips. Using 2,048 CPU cores, the test achieved a 100x speed performance.

Arteris licensed its FlexNoc 5 interconnect IP to GigaDevice for development in automotive SoC with enhanced FuSA standards.

Infineon and Quantinuum teamed up to develop the future generation of ion traps, aimed at accelerating quantum computing and progressing in fields such as GenAI, AI, chemistry, and material science.

Fig. 1: An Infineon wafer with Quantinuum ion trap chips. Source: Infineon

Infineon also announced a rad-hard by design 512-Mbit QSPI NOR flash memory for space and extreme environment applications, with a 133 MHz quad serial peripheral interface. In addition, the company unveiled wire protection technology for decentralized and zonal power distribution architectures.

Siemens and Infineon extended their partnership on software-defined vehicles, bringing Siemens’ Capital Embedded AR Classic to Infineon’s AURIX TC4x MCUs. The companies also are collaborating on embedded ECU software for BMW’s next-gen vehicles. Infineon also added free real-time operating system support for its AURIX TC3x MCUs.


Events and Further Reading

Find upcoming chip industry events here, including:

Event Date Location
Materials Research Society Fall Meeting and Event Dec 1 – 6 Boston
Advancing Digital Twins in Semi Manufacturing Dec 4 – 5 Milpitas, CA
IEDM Dec 7 – 11 San Francisco
SEMICON Japan Dec 11 – 13 Tokyo
AI Executive Conference: The Power of AI to Transform Semi Design and Manufacturing Dec 12 San Francisco
ISS 2025: Industry Strategy Symposium Jan 12 – 15 Half Moon Bay, CA
IEEE/EPS Hybrid Bonding Symposium Jan 16 – 17 Silicon Valley
Chiplet Summit 2025 Jan 21 – 23 Santa Clara, CA
SPIE Photonics WEst Jan 25 – 30 San Francisco
DesignCon 2025 Jan 28 – 30 Santa Clara, CA
Find All Upcoming Events Here

Upcoming webinars are here.


Semiconductor Engineering’s latest newsletters:

Automotive, Security and Pervasive Computing
Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials



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