Faster Mask Synthesis With GPUs

Accelerating computational lithography to enable more advanced optimizations at leading-edge nodes.

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Design teams face rising pressure to deliver larger chips with higher transistor densities on tighter schedules using advanced node processing. The computing demands of modern applications, especially those making heavy use of AI, are extending pressure beyond design to every step of the development flow, including manufacturing, where photolithography and mask synthesis must keep pace. This post looks at how graphics processing units (GPUs) are accelerating computational lithography – making mask synthesis faster while enabling more advanced optimizations at leading-edge nodes.

Industry background: AI is reshaping compute demand

AI is driving an unprecedented surge in compute demand across devices and, even more significantly, across the infrastructure required to train the machine learning (ML) models they use. This is resulting in a rapid rise in data centers and growing demand for advanced semiconductors that can provide the compute performance and energy efficiency those workloads require. Industry forecasts project the worldwide semiconductor market to reach one trillion dollars by 2030, raising the premium on manufacturing efficiency and cycle time.

A useful way to visualize this shift is to compare historical compute scaling shown by the blue line in the figure below with today’s AI-driven growth shown by the red line. For many years, compute power increased at a relatively predictable pace. Recent generations of AI models have sharply accelerated that curve, with computational demand rising by orders of magnitude in short timeframes.

This dramatic growth in computation is pushing designs towards the most advanced technology nodes with increased transistor densities and larger chips. For example, CPUs in the early 2000s contained 100 million transistors, while today’s leading GPUs integrate on the order of 200 billion transistors in chiplet-based designs. Industry experts predict chips with one trillion transistors using multi-die designs by 2030.

Why lithography is under pressure

Photolithography transfers patterns from a photomask to wafers during semiconductor manufacturing. At advanced nodes, diffraction-related proximity effects and process effects cause features to print differently than intended, producing rounded corners, unintended linewidths, or missing features. These errors can directly impact device yield, so compensating for them during mask synthesis is essential.

Computational lithography addresses this by modeling the manufacturing process to predict imaging errors and guiding corrections so the printed wafer pattern aligns with the design intent. Optical proximity correction (OPC) iteratively adjusts the mask features until the simulation predicts a close match to the desired pattern.

As design density increases, OPC correction freedom becomes more constrained. Inverse lithography technology (ILT) provides a more flexible freeform correction approach that is better suited for dense design layouts. ILT uses process models to compute the mask shapes required to achieve the desired pattern on the wafer—treating the mask as a continuous shape for greater optimization freedom and improved manufacturing precision.

Why GPUs matter for computational lithography

Computational lithography requires a lot of compute power—especially for ILT. While OPC compute requirements have historically been addressed through parallel processing across multiple CPU cores, ILT is much more computationally intensive. Even with extensive parallel CPU processing, a single ILT mask can occupy more than ten thousand CPU cores for multiple days. This has led manufacturers to look for alternative ways to run ILT faster.

GPUs offer a compelling complement to CPUs because they deliver massive parallel processing—often thousands of cores compared to the dozens typical in CPUs. As a result, modern GPUs can be orders of magnitude more efficient than comparable CPUs, and their performance improvement rate has outpaced CPUs in recent years, as shown in the illustration below. For many EDA workloads, the best approach is hybrid: keeping control-heavy tasks on CPUs while offloading highly parallel computations to GPUs. Computational lithography is a strong match for this type of CPU+GPU use model.

A proven, industry-first solution

A new white paper describes a recent collaborative effort between NVIDIA, TSMC, and Synopsys to accelerate computational lithography using GPUs. Synopsys Proteus full-chip mask synthesis and the Synopsys S-Litho rigorous simulator now use the NVIDIA cuLitho library and NVIDIA GPUs to accelerate key steps in the flow. The result is the industry’s first GPU-accelerated computational lithography solution for full-chip mask synthesis using both ILT and OPC.

The table below shows performance results from an NVIDIA Blackwell GPU system, illustrating how GPU acceleration can reduce turnaround time while scaling efficiently as GPUs are added. In this example, turnaround time drops from 132 minutes on CPU-only hardware to as low as 5 minutes when using CPUs supplemented with 8 NVIDIA B200 GPUs – an overall speedup of 24.5x.

What’s next

The white paper goes deeper into how OPC and ILT work, the major computational steps involved, and how GPUs are able to accelerate the computations in many of these steps.

There is much more to come; computational lithography remains a highly active area for research, development, and deployment. Additional algorithms and data structures, including some that are not inherently GPU-friendly, are being adapted to benefit from the parallel processing of GPUs. At the same time, AI and ML are increasingly being used to learn from prior mask optimizations and improve future runs. The Synopsys-NVIDIA-TSMC partnership continues to extend support for the latest advanced processes and new generations of NVIDIA GPUs.

The future for GPU acceleration of computation lithography is bright indeed.



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