Where the next boosts will come from and why.
Rambus Chief Scientist Craig Hampel talks about what will drive the next big performance gains after Moore’s Law, from the data center to the edge.
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Why multi-die solutions are getting so much attention these days.
Technology offers improved brightness, colors, and lower power, but they’re expensive and difficult to manufacture.
As endpoint architectures get more complicated, EDA tool becomes key tool for experimenting with different options.
Wave of new options under development as scaling runs out of steam.
Adding an eFPGA into an SoC is more complex than just adding an accelerator.
Pre-characterized tiles can move Moore’s Law forward, but it’s not as easy as it looks.
Why the promise of unlimited power in end devices has achieved only spotty success.
Is it possible to reduce the power consumed by memory by 50%? Yes, but it requires work in the memory and at the architecture level.
Checking the electrical characteristics of circuits is becoming much more challenging.
Can mixed-signal architectures boost artificial intelligence performance using less power?
Even at older nodes with mostly digital circuitry, noise is a growing problem.
When going to a smaller node is no longer an option, how do you get better power performance? Several techniques are possible.
Experts at the Table, part 1: Choices vary depending upon application, cost and the need for capacity and bandwidth, but the number of options is confusing.
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Interests: System-Level Design Low Power-High Performance Manufacturing, Packaging & Materials Test, Measurement & Analytics IoT, Security & Automotive
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