tag: 10nm

Litho Roadmap Remains Cloudy
By Mark LaPedus - 19 Sep, 2013 - Comments: 0

By Mark LaPedus For some time, the lithography roadmap has been cloudy. Optical lithography has extended much further than expected. And delays with the various next-generation lithography (NGL) technologies have forced the industry to re-write the roadmap on multiple occasions. Today, there is more uncertainty than ever in lithography. Until recently, for example, leading-edge logic chipma... » read more

Executive Briefing: Soitec CEO
By Mark LaPedus - 19 Sep, 2013 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss FD-SOI, solar and various technology trends with André-Jacques Auberton-Hervé, chairman and chief executive of Soitec, a supplier of silicon-on-insulator (SOI) substrates, solar concentrators and other products. SMD: The digital process roadmap is moving in several directions. Some pure-play foundries will offer ... » read more

Experts At The Table: Process Technology Challenges
By Mark LaPedus - 05 Sep, 2013 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future transistor, process and manufacturing challenges with Subramani Kengeri, vice president of advanced technology architecture at GlobalFoundries; Carlos Mazure, chief technical officer at Soitec; Raj Jammy, senior vice president and general manager of the Semiconductor Group at Intermolecular; and Girish Dixit, v... » read more

The Week In Review: July 22
By Mark LaPedus - 22 Jul, 2013 - Comments: 0

By Mark LaPedus ASML Holding has been under pressure to bring extreme ultraviolet (EUV) lithography into mass production. EUV is still delayed. Now, in their latest roadmaps, leading-edge chipmakers are counting on ASML’s 300mm EUV scanner for insertion at the 10nm node. Yet, at the same time, ASML also is working on a 450mm version of the EUV tool. “EUV (on 300mm) is a higher priority th... » read more

High NA EUV Litho May Require Larger Photomask Size
By Jeff Chappell - 18 Jul, 2013 - Comments: 0

By Jeff Chappell With extreme ultraviolet lithography (EUV) potentially being used in pilot production in a few years, it raises the question of larger photomasks sizes—will the industry need them, and if so, when? While there has been discussion of late about the possible need to transition to a larger mask size, veterans of the mask business may feel it's déjà vu all over again. Back... » read more

Seeing Spots At 10nm
By Ed Sperling - 15 Jul, 2013 - Comments: 0

By Ed Sperling The relentless march to smaller process nodes means the defects are getting smaller, more numerous, and much harder to find. That explains why Applied Materials and KLA-Tencor both introduced new defect review and classification tools last week. The move to the 1x nm is on the top of both companies’ agendas, and with that comes defects on the walls of finFETs in addition to... » read more

Experts At The Table: Changes In The Ecosystem
By Ed Sperling - 01 Jul, 2013 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down with Michael Buehler-Garcia, director of design solutions marketing at Mentor Graphics; Seow Yin Lim, group director for marketing at Cadence; Kevin Kranen, director of strategic alliances at Synopsys, and Tom Quan, director at TSMC. What follows are excerpts of that conversation. SMD: How are chipmakers working with the rest ... » read more

Experts At The Table: Changes In The Ecosystem
By Ed Sperling - 01 Jul, 2013 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down with Michael Buehler-Garcia, director of design solutions marketing at Mentor Graphics; Seow Yin Lim, group director for marketing at Cadence; Kevin Kranen, director of strategic alliances at Synopsys, and Tom Quan, director at TSMC. What follows are excerpts of that conversation. SMD: How are chipmakers working with the rest... » read more

Inside A 450mm Metrology Consortium
By Mark LaPedus - 20 Jun, 2013 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss 450mm metrology challenges with Menachem Shoval, a former manufacturing executive at Intel and chairman of the Metro450 consortium. The Israeli-based consortium is developing metrology technology for the next-generation, 450mm wafer size. The group consists of Intel, Applied Materials, Jordan Valley, Nanomotion, Nov... » read more

VLSI Kyoto – The SOI Papers
By Various Writers - 19 Jun, 2013 - Comments: 0

By Adele Hars There were some breakthrough FD-SOI and other excellent SOI-based papers that came out of the 2013 Symposia on VLSI Technology and Circuits in Kyoto (June 10-14, 2013). By way of explanation, VSLI comprises two symposia: one on Technology; one on Circuits. However, papers that are relevant to both were presented in “Jumbo Joint Focus” sessions.  The papers should all b... » read more

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