Changes And Challenges


At 130nm, the shift to copper interconnects and 300mm wafer sizes was considered to be the most difficult transition in its long and incredibly efficient history. The next chapter will be even tougher. It’s not that change is a foreign concept to semiconductor design and manufacturing. In fact, it’s probably the only constant over the past 50 years. But in the past, those changes tended ... » read more

Inside Leti’s Litho Lab


By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future lithography challenges with Serge Tedesco, lithography program manager at CEA-Leti; Laurent Pain, lithography lab manager at CEA-Leti; and Raluca Tiron, a senior scientist at CEA-Leti. SMD: CEA-Leti has two major and separate programs, including one in directed self-assembly (DSA) and another in multi-beam ... » read more

Experts At The Table: Issues In Metrology And Inspection


By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future metrology and inspection challenges with John Allgair, senior member of the technical staff at GlobalFoundries; Kevin Heidrich, vice president of marketing and business development at Nanometrics; Robert Newcomb, executive vice president at Qcept Technologies; and Shrinivas Shetty, vice president of marketing f... » read more

Design-For-DSA Industry Begins To Assemble


By Mark LaPedus The industry is aggressively pursuing directed self-assembly (DSA) as an alternative patterning technology for future chip designs. DSA, which enables fine pitches through the use of block copolymers, is in the R&D pilot line stage today. The fab tools, process flows and materials are basically ready, but there are still several challenges to bring the technology from th... » read more

Waiting For 3D Metrology


By Mark LaPedus Over the years, suppliers of metrology equipment have managed to meet the requirements for conventional planar chips. But tool vendors now find themselves behind in the emerging 3D chip era, prompting the urgent need for a new class of 3D metrology gear. 3D is a catch-all phrase that includes a range of new architectures, such as finFET transistors, 3D NAND and stacked-die ... » read more

Reaching For The Reset Button In Lithography


By Mark LaPedus Amid ongoing delays and setbacks, extreme ultraviolet (EUV) lithography and multi-beam e-beam have both missed the 10nm logic node. So for the present, chipmakers must take the brute force route at 10nm by using 193nm immersion with multiple patterning. Now, it’s time to hit the reset button. For the 7nm node, chipmakers currently are lining up the lithographic competition... » read more

Directed Self-Assembly Grows Up


By Mark LaPedus At last year’s SPIE Advanced Lithography conference, Christopher Bencher, a member of the technical staff at Applied Materials, said the buzz surrounding directed self-assembly (DSA) technology resembled the fervor generated at the famous Woodstock rock concert in 1969. This was clearly evident from the tumultuous and free-flowing movement that threatened the status quo o... » read more

Breakthroughs Required


Linear progressions have a hypnotic effect on even the smartest people. They lull everyone into thinking that progress—or at least a progression—is a straight line, with little or no recognition that things are changing around the edges. The periphery is definitely changing, though. And over the next couple of process nodes, the semiconductor manufacturing industry either will have to fi... » read more

Directed Self Assembly, double patterning and crying in beer


In the creative, or desperate, rush to find ways to pattern 10 nm node using double patterning immersion 193nm lithography, a designer from ARM is left “crying in his beer” at the consequent design difficulties. This heart rending admission was one of many insights that came at the sessions on Directed Self Assembly (DSA) at Advanced Lithography. Double Patterning has become the -we have... » read more

Bit Mapping


The rule of thumb for semiconductor manufacturing is that big breakthroughs tend to last a decade, or about five process nodes. While the transistor already has spanned more than five decades and the IC more than four decades, the technology used to create them typically only lasts about one. 193nm lithography has been around more than a decade. Bets were being made publicly back at 45nm—o... » read more

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