3D Effects At 20nm And Beyond


At the 20nm process node and below, attenuated phase shift masks (PSM) are used in the photolithography process, which results in approximately 70nm of topography. This now must be accounted for using 3D mask approximation. Aki Fujimura, CEO of [getentity id="22864" comment="D2S"], explained that in terms of [getkc id="80" comment="lithography"], where simulation-based technologies are used,... » read more

Migrating Consumer Electronics To The Automotive Market With Calibre PERC


Tough reliability standards for electronic automotive safety systems ensure that integrated circuits (ICs) for these systems comply with demanding performance and reliability requirements. However, companies seeking to leverage their consumer-based intellectual property (IP) for use in automotive “infotainment” and “connected car” applications are finding that many of these performance ... » read more

Capacity Constraints And DFM At Mature Nodes


We’re witnessing an interesting phenomenon in the SoC segment of the semiconductor industry today. One might call it the “forced waterfall effect.” What I’m referring to is the tendency for production at semiconductor nodes older than the leading edge to be under long-term foundry capacity constraints. Normally this occurs with the “hot process node,” that is, the leading edge wh... » read more

Blog Review: March 18


How do you quantify effort spent in FPGA verification? Mentor's Harry Foster tackles the question in his latest installment of the Wilson Research Group functional verification study. A new frontier of design challenges is rapidly emerging, according to ARM CEO Simon Segars. Cadence's Brian Fuller brings us his keynote address at CDNLive. Synopsys' Tushar Mattu is back with more on AXI VI... » read more

First Time Success And Cost Control


First time success has been the ultimate goal for semiconductor companies due to escalating mask costs, as well as a guiding objective for the development of EDA tools, especially in the systems and verification space. These pressures are magnified for the [getkc id="76" comment="Internet of Things"] (IoT), especially the edge devices. Have system-level tools been able to contribute to first ti... » read more

Week 40: Look Who’s Talking


I have to admit I feel like a child bursting with excitement to announce our designer keynote for Monday’s opening session at DAC. Brian Otis from Google will give a talk entitled, “Google Smart Lens: IC Design and Beyond.” The project made news last summer with the announcement of a licensing deal between Google and Novartis to develop technology to help manage diabetes. It will be great... » read more

The Week In Review: Design/IoT


Mergers & Acquisitions NXP added to its list of recent acquisitions with Athena SCS, a UK-based provider of embedded software and cryptography for smart cards and NFC. Lattice Semiconductor closed its all-cash $606.6 million acquisition of Silicon Image. Tools Cadence unveiled the Innovus Implementation System. The physical implementation tool sports massively parallel architect... » read more

Automotive Drives Novel IP Demands


In the past the automotive industry was a bit sleepy when it came to technologic innovations. Clearly, this is no longer the case. The automotive segment is now driving interesting capabilities and an unprecedented level of creativity by the IP and SoC engineering teams targeting this now-dynamic sector. Historically, electronics for automotive was very different from those aimed at consumer... » read more

Antennas Everywhere


A simple rule when it comes to electronics is that while digital circuits scale, antennas do not. That may not sound like a serious problem until you consider that as more devices get connected—cars, watches, industrial equipment—and they add more features that require interaction with the outside world, they need more antennas to make it all work. In the future, there literally will be... » read more

Modeling High-Performance Analog And RF Circuits In Nanometer-Scale CMOS


By Mick Tegethoff and David Lee Today’s consumer, communication, and computer electronic devices have clocks, communication interfaces, and high-speed signal-conditioning circuits that operate at radio frequencies (RF). Providing price-competitive products often requires monolithic integration of these circuits in low-power nanometer-scale bulk CMOS silicon. This is a worst-case scenario for... » read more

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