tag: Siemens EDA

Power Shift
By Ed Sperling - 14 Jun, 2012 - Comments: 0

By Ed Sperling For the past decade, most of the real gains in energy efficiency were developed for chips inside mobile electronics because of the demand for longer battery life. Dark silicon now represents the majority of mobile devices, multiple power islands are commonplace to push many functions into deep sleep, and performance is usually the secondary concern for most applications. Whil... » read more

Experts At The Table: Improving The Efficiency Of Software
By Ed Sperling - 14 Jun, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Design sat down to talk about how to write better software with Jan Rabaey, Donald O. Pederson Distinguished Professor at the University of California at Berkeley; Barry Pangrle, solutions architect for low-power design and verification at Mentor Graphics; Emily Shriver, research scientist at Intel; Alan Gibbons, principal engineer at Synopsys; and Da... » read more

Efficiency Vs. Accuracy
By Barry Pangrle - 14 Jun, 2012 - Comments: 0

By Barry Pangrle If all you have is a hammer, everything looks like a nail. I wrote an article, Power vs. Accuracy, last year that discussed tradeoffs between power and accuracy for different applications. It turns out that for a number of processing applications, if every bit isn’t perfect, the impact on the final result might not be all that great. Anyone performing financial analytical... » read more

Executive Briefing: Trillion-Gate Designs
By Ed Sperling - 31 May, 2012 - Comments: 0

Wally Rhines, CEO of Mentor Graphics, talks with System-Level Design about what's needed for trillion-gate designs, the increasing demands of verification and emulation, new tools for stacked die and the trend toward designing for the enterprise. [youtube vid=pQs1qNkFvVo] » read more

Getting Ready For 20nm
By Ed Sperling - 29 May, 2012 - Comments: 0

By Ed Sperling and Mark Lapedus Despite hurdles in getting 28nm rolling and predictions that process technology will stick around for years to come, there appears to be rapidly growing interest in 20nm—at least from the design side. This is significant for a couple reasons. First, for most companies 20nm will be the first encounter with double patterning because EUV still is not viable—... » read more

The Hidden Costs Of Directed Self-Assembly
By Ed Sperling - 29 May, 2012 - Comments: 2

By Mark LaPedus Directed self-assembly (DSA) has been billed by some as a potential paradigm shift in semiconductor manufacturing, but it may not turn out to be quite the panacea its proponents suggest—or at least not yet. There are many questions surrounding DSA, an alternative lithography technology that makes use of block copolymers to enable fine pitches. Key among those questions ar... » read more

Finding And Eliminating Hot Spots
By Various Writers - 29 May, 2012 - Comments: 0

With the continuous development of today’s technology, IC design becomes a more complex process. The designer now not only takes care of the normal design and layout parameters as usual, but also needs to consider the process variation impact on the design to preserve the same chip functionality with no failure during fabrication. In the current process, schematic designers go through extensi... » read more

The Brave New World Of Modeling TSVs
By Ed Sperling - 26 May, 2012 - Comments: 0

By Ann Steffora Mutschler With 2D ICs the prevailing notion has been that wire parasitics are relatively self-contained with the exception of very advanced designs running at hundreds of gigahertz. For the most part, the package designer and IC designer lived in their own separate worlds. With the advent of chip stacking using through silicon vias (TSVs), those worlds are being thrust together... » read more

Packaging Tradeoffs More Complex Than Ever
By Ed Sperling - 24 May, 2012 - Comments: 0

By Ann Steffora Mutschler Driven by high-speed interfaces, the demand for TSVs and the complexities that new process nodes bring, older packaging technologies like wirebonding can’t keep up. The latest and greatest flip chip technologies offer much more flexibility, but at a cost. As such, the package plays a larger role than ever in determining system specifications because, depending o... » read more

EDA’s Cloudy Vision
By Ed Sperling - 24 May, 2012 - Comments: 0

By Ann Steffora Mutschler Since the dawn of EDA, the industry has largely operated under a traditional software distribution model whereby the customer would run the software it licensed on its own hardware equipment. With the sophistication of advanced IT management techniques as well as education surrounding “The Cloud,” it may be safe to predict that engineers in the not-to-distant futu... » read more

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