tag: stacked die

What Happened To 450mm?
By The SE Staff - 17 Jul, 2014 - Comments: 1

By Mark LaPedus, Ed Sperling & Katherine Derbyshire There was a time not very long ago—one process node, in fact—when the economic momentum of Moore’s Law seemed unstoppable with a combination of extreme ultraviolet lithography, larger wafer sizes and a variety of new materials. Shrinking feature sizes is still technically possible, but certainly not with the same promised economic benef... » read more

All Roads Point Up…But When?
By Ed Sperling - 17 Jul, 2014 - Comments: 0

One of the clear messages at Semicon West this month was that stacked die are coming soon. The only question is how soon. This isn’t so simple to answer. It depends on a lot of factors, and for most of them there aren’t any clear answers. First of all, no one is certain what the cost equation will look like at 14/16nm, particularly once the process technology becomes more mature. Ther... » read more

Confusion Does Not Equal Paralysis
By Ed Sperling - 10 Jul, 2014 - Comments: 0

After attending the two biggest semiconductor conferences in the world, along with a long list of notable conferences targeted to a wide variety of technologies and engineering disciplines, it’s clear the industry is racing ahead. But “ahead” is now a relative term. While Moore’s Law satisfied both economic and technological requirements, it was easy to figure out what “ahead” me... » read more

Stacked Die Are Coming Soon. Really
By Ed Sperling - 10 Jul, 2014 - Comments: 3

Since the beginning of the decade there have been many predictions that stacked die were just over the hill, but the time it has taken to climb that hill has been longer than most people would have anticipated. In fact, TSMC has been fully capable of building stacked die since last year, with risk production expected to be completed by year, according to Gartner. But something very fundament... » read more

Five Disruptive Test Technologies
By Mark LaPedus - 19 Jun, 2014 - Comments: 0

For years, test has been a critical part of the IC manufacturing flow. Chipmakers, OSATs and the test houses buy the latest testers and design-for-test (DFT) software tools in the market and for good reason. A plethora of unwanted field returns is not acceptable in today’s market. The next wave of complex chips may require more test coverage and test times. That could translate into higher... » read more

Mobile Packaging Market Heats Up
By Mark LaPedus - 19 Jun, 2014 - Comments: 0

Apple, Samsung and others are developing the next wave of smartphones and tablets. OEMs want to cram more chip functions in smaller IC packages, but there are some challenges in the arena. In fact, there are signs that the mainstream packaging technology for mobiles is running out of steam. For some time, mobile products have incorporated a technology called package-on-package (PoP), which u... » read more

Tech Talk: The New Cost Per Gate Equation
By Ed Sperling - 22 May, 2014 - Comments: 1

eSilicon's Javier DeLaCruz talks with Semiconductor Engineering about new types of interposers, why just shrinking features is doomed, and what progress has been made in building 2.5D chips. [youtube vid=akj8r8nNktM] » read more

Drowning In Choices
By Ed Sperling - 15 May, 2014 - Comments: 0

There are at least half a dozen possible options for 28nm process technologies. There will be even more for the finFET generation. And that’s just the beginning of how complicated things will become over the next few years. There are multiple ways to test, seemingly infinite numbers of IP offerings—even from the same IP providers—and even more packaging options to put them together. Th... » read more

Shootout At 28nm
By Ed Sperling - 15 May, 2014 - Comments: 0

By Ed Sperling & Mark LaPedus Samsung, Soitec and STMicroelectronics are joining forces on 28nm FD-SOI, creating a showdown with TSMC and others over the best single-patterned processes and materials and raising questions about how quickly companies need to move to the finFET technology generation. The multi-source manufacturing collaboration agreement for fully depleted silicon-on-insulato... » read more

Beyond Moore’s Law
By Michael Watts - 15 May, 2014 - Comments: 0

What do you make of all the different reports coming out of Advanced Lithography 2014 — the end of Moore's Law, continued problems with EUV, directed self-assembly assembly makes progress? An equipment insider, whose judgment I value, came back from the meeting and concluded, "We will see the end of Moore’s Law shrinks in 2020. After that, no one knows!” There is no way a $300B+ business ... » read more

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