When Standards Enable Chiplets

Semiconductor Engineering sat down and discussed the need for standards to enable an ecosystem for chiplets with Mark Kuemerle, vice president of technology for Marvell; Letizia Giuliano, vice president for product marketing and management at Alphawave Semi; Hee-Soo Lee, HSD segment lead for Keysight; Mick Posner, senior product group director for Cadence’s Compute Solutions Group; and Rob Kruger, product management director for Synopsys’ multi-die strategy solutions group. What follows are excerpts from a roundtable discussion held at this year’s Design Automation Conference. Part 1 of this discussion is here. Part 2  is here.

SE: In the soft IP era, the ecosystem was helped along by the creation of a standards body — the Virtual Socket Interface Alliance — that oversaw the emerging industry and helped pull the necessary standards together. Why are we not seeing that level of cooperation within the industry now, solving the problems collectively, rather than everybody trying to do it on their own in little groups?

Giuliano: It is because of time-to-market and the way we need to act these days. It doesn’t allow us to get together and standardize. We’re moving too fast to let a body or standardization effort do something. We don’t have the time to do that.

SE: Does that mean the industry has to settle on de facto standards quickly?

Giuliano: What is happening is that we build a solution, and after the solution is built, we build the standard around it for the followers. We are going to pioneer what gets done, and then the followers are going to get the benefit from what we standardized. I am positive. There are some bodies that are working very well — OCP, JEDEC, UCIe and others. They are working toward it, but it is slower than it used to be.

Posner: You nailed it when you said that each of the organizations out there today are solving a vertical. They’re solving it for their application. Not everyone can spend time solving the automotive challenges. The imec automotive group is solving those. Someone else is solving the data center problems. They don’t have time to look at what may be good for everyone, but I believe they will converge over time. Unfortunately, that will be when de facto standards will come out.

SE: But nobody is even trying to solve the power problem today.

Kuemerle: One thing that worked really well for HBM was that it was standardized through JEDEC. Everybody gets together and argues about literally everything. Where is every pin located on the interface for an HBM? What is the exact form factor that you can use? That makes something that three different suppliers can build, and you can plug it into an interposer. It will probably work. We are missing that for other applications. In our conversations last year, we talked about the need to define a bunch of sockets. For each of those, we must get to a point where we can standardize to the level that HBM is standardized for these chiplet applications. That is how we make progress. The downside is it just takes too long to go through standards to meet the pace that we need from chiplets today.

Lee: The industry can work faster than before when we look at the generation of the standards…

Kruger: PCIe 5, 6 and 7 — and now talking about 8. It is all going faster.

Lee: In the past, each took a few years. Now, each is done in less than one year.

Kuemerle: The one standard that is our golden child for this is the JEDEC standard for HBM. But I don’t perceive that as rapidly evolving as quickly as other things.

Posner: HBM is also a lowest common denominator solution. If you look at the HBM providers, they each offer special features. One says, ‘We can go a little faster than the JEDEC spec.’ Another has this ‘XYZ’ feature. So JEDEC helped pull everyone together, and for a company like Marvell, that is great. You can multi-source, and know that as long as you’re following JEDEC, you have a minimum level of operation performed by each solution. But I guarantee that your engineers were then saying, ‘And if we use one particular HBM solution, it will enable this extra mode.’

SE: Haven’t IP providers always done that?

Posner: That’s true, but it is worse now. Going back to the foundries, they each have differentiated packaging. They talk about standardization, but there is no motivation. I’m not seeing any motivation for them to standardize around packaging, because they see that as their differentiation. They don’t want anyone to move out of their ecosystem. They want everybody in their ecosystem. We’re challenged with that. They see it as the next frontier.

Giuliano: Standardization only happens when users and vendors are divided, and they come together because they both need standardization. But when users and vendors are arranged vertically, there is no need for standardization. If I am constructing something that I build myself, maybe with partners, I’m doing it all myself. There are no users and vendors. For memory, we have the memory vendors, and we have the users. They had to come together and standardize so that they would have something to sell, at least at a compliance level. But for chiplets, we are not at that point yet, because we’re moving too quickly. Maybe there are other applications that will benefit from the standardization of well-defined chiplets. But the first users are going to be custom users. And then for future applications, maybe an FPGA is a good example, or maybe automotive would be another one, that really requires standardization.

Kruger: Most of the ecosystems are closed systems. Even if they’re not building everything themselves, they’re defining the specs. And then they ask about standards, and they ask if you beat that.

Giuliano: Can you do something faster, lower power, or what have you? I don’t want to come to conclusions, but maybe for some applications there will be a chiplet marketplace and ecosystem. But for other applications, they will be on their own and it will remain closed.

SE: What can we expect to happen over the next year? If we meet again in 12 months, what will have changed?

Kuemerle: Last year it was DFT, but it’s really hard to predict where we’re going to see movement. Maybe it will be thermal.

Kruger: Chiplets are another way of delivering IP. And you’re going to see a move up the curve of people who went from buying IPs to buying maybe subsystems, maybe buying more services. We have to think about not just an IP, a protocol, but how a chiplet is going to work in the larger system. What do we have to provide for deliverables for software and other aspects, such as power? We need to define how we offer more value to the customer, not just for this chiplet and IPs, but also how it interacts with the rest of the system, and help customers deal with that challenge.

Lee: We will see progress in two areas. When it comes to solving power issues, and more specifically, how solutions truly take in the migration to becoming three-dimensional. This is vital for thermal issues, and most of the new problems are related to power. How do I deliver 1000s of Amps, making sure the system performs how you want? This is where I would like to see us making progress, being able to actually address a lot of issues. The other area is increased predictability, including system level performance of the chiplets. That is a good way for us to be able to contribute to this challenge.

Giuliano: I hope to see progress on ecosystems. I hope to see more application-driven ecosystems, where they solve problems for their domain. And some of them may also be useful in other areas. Different data interfaces for different applications also would be good.

Kuemerle: We would like to see one link layer that works for some chiplet other than UCIe.

SE: One of the things that you said last year is that you had never managed to re-use a chiplet. Are you any closer to that today?

Kuemerle: That has changed, and that’s why I referred to the chiplet as being the tail that wags the dog. We have scenarios where we can re-use chiplets. But I wanted to point out the distinction that it’s not as easy as having a chiplet that can plug into somebody else’s system and that wasn’t pre-planned. The new observation from me is that when we’re making chiplets, for the user it becomes, ‘What chiplet can I get?’ And because there’s no unified standards for how I plug them together, it is the glue that holds them together that becomes the custom part of the product. That is really, really hard. I’m sure you see the challenges, but it is one thing that has changed since last year.

Giuliano: You have to go to a flow of integrating chiplets and learning what you need to do to make something future-proof or backward-compatible. You need to go through that flow to start with. This is my checklist for next time to make it future-proof. It’s a survival thing.

Kuemerle: Otherwise, it’s a huge investment for every different application.

Posner: Cost, customization, configuration. If you can’t get that, then why are you doing it? In a year’s time, we will have the same conversation, but there will be examples of mini ecosystems. The first proof cases of mixing-and-matching chiplets from different providers are still based on pre-planning. When you jump-start an ecosystem, you still have to design to an ecosystem. We won’t be at the stage where you can just mix-and-match, but there will be ecosystems where you can design based on a known chiplet specification.

SE: Presumably you would have to qualify that within a single foundry.

Posner: Not necessarily. We are beginning to see some level of convergence. That is a key component of making chiplets work. The foundries want to lock you into one node, but you don’t have to have your whole chip from a single foundry.

Giuliano: There are use cases that will force us to do that. When you start looking at an ADC or DAC, mixed-signal, optical…

Posner: That is already happening. I am amazed about how much has moved in the last couple of years. The tempo has definitely increased.

Lee: You talked about reusable chiplets. How far are you toward your ultimate goal of completely reusable chiplets?

Kuemerle: That depends if you mean plug-and-play, or if you have to plan for it. Right now, we are perhaps 20% of the way there — less than 50%, for sure.

Giuliano: Once you go through that flow a couple of times, you learn how to make it.

Kuemerle: As an industry, we would benefit from companies that build relatively straightforward designs, I/O chiplets, that actually get together and say, ‘Let’s set a target for dimensions, pin locations, interfaces, link layers.’ If we got together and did that for one application — maybe it’s even something that nobody cares that much about — that would make a big difference. If we could get together some of the key players in the industry who are interested in chiplets in some quasi-standards organization and hash out, ‘Here’s what we do, and then here’s how we test it,’ that could pay huge dividends. But we don’t need it to be a real application because then nobody cares about the application enough to compete with each other. We just want to do it out of the goodness of our hearts.

Related
Chiplet Ecosystem Slowly Emerges Part 2 of above roundtable.
Before the transition can be made from custom chiplet environments to a standardized off-the-shelf open marketplace, an ecosystem must be created.
When Can I Buy A Chiplet? Part 1 of above roundtable.
A chiplet ecosystem is under development, but many barriers must be overcome before a thriving marketplace can exist.