Blog Review: August 20

Time-of-flight sensors; manufacturing quantum chips; collaboration for growth; wafer shipment conundrum; sparse linear algebra.

popularity

Cadence’s Sriram Sharma Kalluri finds that time-of-flight sensors are poised to revolutionize ADAS by generating precise 3D point clouds that, particularly when combined with lidar, contribute to an exceptionally accurate and comprehensive understanding of the vehicle’s surroundings.

Synopsys’ Igor Markov and other industry experts discuss how quantum computing is moving from research to practical applications, including the myriad qubit modalities that have emerged and the challenges in manufacturability.

Siemens’ Bianca Ward suggests that for the semiconductor industry to continue its aggressive growth, organizations will need to approach both fab commissioning and operation as well as chip design with a more collaborative strategy.

SEMI’s Sungho Yoon examines why wafer shipments have remained flat even as AI semiconductor demand is booming and fab investments are rising, and suggests that the demand pattern of fab operations itself has fundamentally changed.

Arm’s Chris Armstrong introduces the new sparse linear algebra functions, including sampled dense-dense matrix multiplication (SDDMM), in the latest release of Arm Performance Libraries and how they align with an emerging cross-vendor effort to build an API standard.

Keysight’s Linas Dauksa considers the critical challenges in deploying large-scale AI infrastructure, as organizations now need to optimize for inference latency, memory efficiency, and distributed model architectures.

Ansys’ Aliyah Mallak explores how simulation is used in drug development, from simulating clinical trial results for proposed new treatments to designing the equipment used to manufacture pharmaceuticals.

Plus, catch up on the latest blogs from the Automotive, Security & Emerging Technologies, Test, Measurement & Analytics, and Low Power-High Performance newsletters:

Power expert Barry Pangrle considers the future of hard disk drives as the cost falls and capacity increases for both HDDs and SSDs.

Synopsys’ Madhumita Sanyal and Diwakar Kumaraswamy explain why real-time inference and large-scale training are pushing the limits of interconnect performance.

Siemens’ Shivani Joshi finds that adaptive optimization algorithms can deliver better results and deeper insight into why certain designs perform better than others.

Rambus’ Raj Uppala shows how a single memory failure in a hyperscale AI cluster can cascade into hours of lost compute time.

Cadence’s Harinee Rathod looks at a fine-grained and efficient control flow that ensures lossless packet delivery in next-gen Ethernet.

Ansys’ Jayraj Nair examines how multi-physics simulation enables designers to explore novel architectures that would otherwise be too risky to attempt.

Arm’s Sergio Alapont Granero explores how to get desktop-class visual fidelity in mobile gaming with dedicated neural accelerators.

Onto Innovation’s Monita Pau warns that a small crack early in the TGV fabrication process can grow into a killer defect.

proteanTecs’ Alex Burlak finds that GenAI workload demands are growing orders of magnitude faster than transistor density.

Modus Test’s Jesse Ko proposes designing smarter test chips with more Kelvin structures around critical interconnects under development.

PDF Solutions’ Christophe Begue explains how accurate real-time data can bridge design, manufacturing, and operations.

Advantest’s Roberto Colecchia details how real-time analytics and using device test data across multiple insertions can improve the test process.

Synopsys’ Pawini Mahajan shows how DFT should be integrated into tools throughout the development flow.

Teradyne’s Mike Halblander looks at the impact of more capable test systems on floor space and infrastructure.

Siemens’ Etienne Racine finds a growing impact on memory with more complex chips.

Rambus’ Adiel Bahrouch explains why ASIL certification requires a deep dive into hazard analysis, safety goal definition, and rigorous verification.

Cadence’s Geeta Arora examines a software-centric virtualization approach for today’s high-density, multi-tenant cloud environments.

Synopsys’ Shylaja Sen and Mouadh Ayache look at how to ensure confidentiality, integrity, and availability throughout the entire hardware lifecycle.

Synaptics’ Neeta Shenoy details why a focus on predictable and low-jitter performance will make Wi-Fi 8 appealing for ultra-high reliability applications.

Siemens’ Ann Keffer discusses how an integrated safety workflow can reduce costly iterations around fault simulation.



Leave a Reply


(Note: This name will be displayed publicly)